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TLV9301 現行 單路、40-V、1-MHz、低功耗運算放大器 Wider temperature range (-40°C to 125°C), lower quiescent current (0.15 mA), higher slew rate (3 V/us), and lower Vos (2.5 mV)

產品詳細資料

Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 36 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 7 Rail-to-rail No GBW (typ) (MHz) 1 Slew rate (typ) (V/µs) 0.5 Vos (offset voltage at 25°C) (max) (mV) 5 Iq per channel (typ) (mA) 1.7 Vn at 1 kHz (typ) (nV√Hz) 20 Rating Catalog Operating temperature range (°C) 0 to 70 Offset drift (typ) (µV/°C) 0 Input bias current (max) (pA) 500000 CMRR (typ) (dB) 90 Iout (typ) (A) 0.025 Architecture Bipolar Input common mode headroom (to negative supply) (typ) (V) 2 Input common mode headroom (to positive supply) (typ) (V) -2 Output swing headroom (to negative supply) (typ) (V) 2 Output swing headroom (to positive supply) (typ) (V) -2
Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 36 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 7 Rail-to-rail No GBW (typ) (MHz) 1 Slew rate (typ) (V/µs) 0.5 Vos (offset voltage at 25°C) (max) (mV) 5 Iq per channel (typ) (mA) 1.7 Vn at 1 kHz (typ) (nV√Hz) 20 Rating Catalog Operating temperature range (°C) 0 to 70 Offset drift (typ) (µV/°C) 0 Input bias current (max) (pA) 500000 CMRR (typ) (dB) 90 Iout (typ) (A) 0.025 Architecture Bipolar Input common mode headroom (to negative supply) (typ) (V) 2 Input common mode headroom (to positive supply) (typ) (V) -2 Output swing headroom (to negative supply) (typ) (V) 2 Output swing headroom (to positive supply) (typ) (V) -2
PDIP (P) 8 92.5083 mm² 9.81 x 9.43 SOIC (D) 8 29.4 mm² 4.9 x 6 SOP (PS) 8 48.36 mm² 6.2 x 7.8
  • Short-Circuit Protection
  • Offset-Voltage Null Capability
  • Large Common-Mode and Differential Voltage Ranges
  • No Frequency Compensation Required
  • No Latch-Up
  • Short-Circuit Protection
  • Offset-Voltage Null Capability
  • Large Common-Mode and Differential Voltage Ranges
  • No Frequency Compensation Required
  • No Latch-Up

The µA741 device is a general-purpose operational amplifier featuring offset-voltage null capability.

The high common-mode input voltage range and the absence of latch-up make the amplifier ideal for voltage-follower applications. The device is
short-circuit protected and the internal frequency compensation ensures stability without external components. A low-value potentiometer may be connected between the offset null inputs to null out the offset voltage as shown in Figure 12.

The µA741C device is characterized for operation from 0°C to 70°C.

The µA741 device is a general-purpose operational amplifier featuring offset-voltage null capability.

The high common-mode input voltage range and the absence of latch-up make the amplifier ideal for voltage-follower applications. The device is
short-circuit protected and the internal frequency compensation ensures stability without external components. A low-value potentiometer may be connected between the offset null inputs to null out the offset voltage as shown in Figure 12.

The µA741C device is characterized for operation from 0°C to 70°C.

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類型 標題 日期
* Data sheet µA741 General-Purpose Operational Amplifiers datasheet (Rev. G) PDF | HTML 2018年 1月 15日
Application note Understanding Operational Amplifier Specifications (Rev. B) PDF | HTML 2021年 8月 16日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日
Application note Handbook of Operational Amplifier Applications (Rev. B) 2016年 9月 19日

設計與開發

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開發板

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放大器性能開發套件 (PDK) 是一款評估模組 (EVM) 套件,可測試通用運算放大器 (op amp) 參數,並與大多數運算放大器和比較器相容。EVM 套件提供主板和多個插槽式子卡選項,可滿足封裝需求,使工程師能夠快速評估和驗證裝置性能。

AMP-PDK-EVM 套件支援五種最熱門的業界標準封裝,包括:

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  • DGK (VSSOP-8)
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  • DCK (SC70-5 和 SC70-6)
使用指南: PDF | HTML
開發板

DIP-ADAPTER-EVM — DIP 轉接器評估模組

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使用指南: PDF
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模擬型號

UA741 PSpice Model

SLOJ138.ZIP (0 KB) - PSpice Model
計算工具

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設計工具

CIRCUIT060013 — 具有 T 網路回饋電路的反相放大器

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設計工具

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設計工具

CIRCUIT060074 — 具有比較器電路的高壓側電流感測

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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具

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使用指南: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
PDIP (P) 8 Ultra Librarian
SOIC (D) 8 Ultra Librarian
SOP (PS) 8 Ultra Librarian

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  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
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