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Cell site gateway router

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Block diagram

Cell site gateway router

Block diagram

Overview

Our integrated circuits and reference designs help you create cell site gateway routers to meet open compute project (OCP) and/or telecom infra project (TIP) specifications. Use the interactive reference diagram below to design high-speed edge routers to support the connectivity needs of 5G base stations.

Design requirements

Cell site gateway router systems require:

  • High-density power management operating at high ambient temperature.
  • Reduced system downtime through detection and prevention of damaging conditions.
  • Network synchronization over packet-based fronthaul interface.
Explore applications similar in function and design

Block diagram

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Cell site gateway router

JTAG JTAG Bus converter (optional) Bus converter (optional) eFuse eFuse DC/DC DC/DC IBV2 IBV2 AC AC HV DC Bus HV DC Bus -48V -48V N+1 PSU N+1 PSU DC/DC DC/DC IBV1 IBV1 Hot swap controller Hot swap controller AC/DC AC/DC IBV1 IBV1 FET FET I2C digital isolator I2C digital isolator ORing ORing POL power (FPGA, ASIC, merchant Si, clocks, etc.) POL power (FPGA, ASIC, merchant Si, clocks, etc.) Converter Converter LDO LDO Multiphase controller Multiphase controller Power stage Power stage CPU & memory power CPU & memory power Multiphase controller Multiphase controller Power stage Power stage Converter Converter DDR termination DDR termination Buck/boost Buck/boost Sequencing & monitoring Sequencing & monitoring Logic Logic Power on reset Power on reset Sequencer Sequencer Fan control Fan control Temp sense Temp sense CPLD CPLD eFuse eFuse Temp switch (heater) Temp switch (heater) GPS GPS GPS module GPS module IO (JTAG, RS232, RS485) IO (JTAG, RS232, RS485) Buffer Buffer JTAG MUX JTAG MUX RS-232 RS-232 ESD ESD PHY PHY USB USB Current limit switch Current limit switch ESD ESD LED driver LED driver Shift register Shift register Logic Logic LED driver LED driver Ethernet ports Ethernet ports 2x8 port 10G SFP+ optical module 2x8 port10G SFP+ optical module 2x4 port 25G SFP28 optical module 2x4 port25G SFP28optical module SFI SFI SERDES SERDES PHY PHY Uplink Uplink 1x2 port 100G QFSP optical module 1x2 port100G QFSP optical module CAUI-4 CAUI-4 PHY PHY Timing (IEEE 1588, Sync-E GPS, 1PPS) Timing (IEEE 1588, Sync-E GPS, 1PPS) Network synchronizer Network synchronizer Clock buffer Clock buffer Oscillator Oscillator Clock generator Clock generator Digital isolator Digital isolator Switch fabric Switch fabric I2C level translator I2C level translator I2C expander I2C expander Voltage translator Voltage translator Latch Latch CPLD CPLD BMC BMC Logic Logic REF REF FPGA FPGA Temp sense Temp sense VMon VMon I2C mux I2C mux Switch ASIC Switch ASIC CPU CPU CPU CPU I2C expander I2C expander I2C level translator I2C level translator Voltage translator Voltage translator Buffer Buffer DDR DDR CPLD CPLD

Technical documentation

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Type Title Date
User guide Using the Fusion Digital Power Designer for TPS536xx VR13 Multiphase Solutions 27 Jan 2017
Technical article How to achieve network synchronization clocks with TI digital PLLs PDF | HTML 26 Jun 2023
Application note Glitch free power sequencing with AXC level translators (Rev. A) 20 Sep 2018
White paper Design considerations of GaN devices for improving power converter efficiency 20 Nov 2017
Technical article Stack current with PowerStack packages for higher power POL PDF | HTML 18 Aug 2023
Application note Optimizing Layout of the TPS54824 HotRod™ Package for Thermal Performance 16 Nov 2018
White paper Overcurrent protection enables more efficient and reliable systems 16 May 2016
Application note Digital Isolator Design Guide (Rev. G) PDF | HTML 13 Sep 2023
White paper Analog advancements make waves in 5G communications 12 Aug 2016
Application note TI Network Synchronizer Clock Value Adds in Communications and Industrial Applic 12 Apr 2018
Application note Multiphase Buck Design from Start to Finish, Part 1 (Rev. B) 11 May 2022
Analog Design Journal Understanding thermal-resistance specification of DC/DC convert. w/ MOSFETs 08 Jan 2018
White paper Internally compensated advanced current mode (ACM) (Rev. A) 07 Dec 2018
Analog Design Journal Comparing internally-compensated advanced current mode (ACM) w/ D-CAP3™ control (Rev. A) 06 Nov 2018
Technical article Powering high-current Broadcom networking processors in Ethernet switches PDF | HTML 05 Jul 2023

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