Core router

Products and reference designs

Core router

Block diagram

Overview

Our integrated circuits and reference designs help you create core routers with ultra-high bandwidth and low-power consumption. Use the interactive reference diagram below to design a high-speed core router with the right interface, physical interface device (PHY), logic and power management products to support the connectivity needs of today's internet backbone.

Design requirements

Modern core routers require:

  • Multi-Gigabit Ethernet transceivers that provide best-in-class signal integrity.
  • Efficient DC/DC converters to power the latest-generation ASICs, FPGAs and CPUs.
  • Small footprint with low power consumption.

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Block diagram

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Core router

JTAG JTAG AC AC HV DC Bus HV DC Bus -48V -48V 48-Port 40/100/400 Gbps Router (2RU Form Factor) 48-Port 40/100/400 Gbps Router (2RU Form Factor) N+1 PSU N+1 PSU DC/DC DC/DC IBV1 IBV1 Hot Swap Controller Hot Swap Controller AC/DC AC/DC IBV1 IBV1 FET FET I2C Digital Isolator I2C Digital Isolator ORing ORing Bus Converter (Optional) Bus Converter (Optional) eFuse eFuse DC/DC DC/DC IBV2 IBV2 POL Power (FPGA, ASIC, Merchant Si, Clocks, etc.) POL Power (FPGA, ASIC, Merchant Si, Clocks, etc.) Converter Converter LDO LDO Multiphase Controller Multiphase Controller Power Stage Power Stage CPU & Memory Power CPU & Memory Power Multiphase Controller Multiphase Controller Power Stage Power Stage Converter Converter DDR Termination DDR Termination Buck/Boost Buck/Boost Bluetooth Low Energy/Zigbee Bluetooth Low Energy/Zigbee Zigbee/Bluetooth Low Energy Zigbee/Bluetooth Low Energy Clocking Clocking Network Synchronizer Network Synchronizer Clock Buffer Clock Buffer Oscillator Oscillator Clock Generator Clock Generator Fan Control Fan Control Fan Controller Fan Controller Temp Sense Temp Sense eFuse eFuse Digital Isolator Digital Isolator RFID RFID RFID RFID Switch Fabric Switch Fabric I2C Level Translator I2C Level Translator I2C Expander I2C Expander Voltage Translator Voltage Translator Latch Latch CPLD CPLD Power On Reset Power On Reset Logic Logic REF REF FPGA FPGA Temp Sense Temp Sense VMon VMon I2C Mux I2C Mux Switch ASIC / Merchant Silicon Switch ASIC / Merchant Silicon Retimer/Redriver Retimer/Redriver Security MCU Security MCU CPU CPU CPU CPU I2C Expander I2C Expander I2C Level Translator I2C Level Translator Voltage Translator Voltage Translator Buffer Buffer Retimer/Redriver Retimer/Redriver DDR DDR IO (JTAG, RS232, RS485) IO (JTAG, RS232, RS485) Buffer Buffer JTAG MUX JTAG MUX RS-232 RS-232 ESD ESD PHY PHY LDO LDO Memory Memory DDR DDR Flash Flash TCAM TCAM USB USB Current Limit Switch Current Limit Switch ESD ESD LED Driver LED Driver Shift Register Shift Register Logic Logic LED Driver LED Driver Downlink (Optical Interface) Downlink (Optical Interface) 400GE Optical Module 400GEOptical Module PHY PHY PHY PHY PHY PHY Retimer/Redriver Retimer/Redriver Front Port Controller Front Port Controller eFuse eFuse 100GE Optical Module 100GEOptical Module 40GE Optical Module 40GEOptical Module ESD ESD Retimer/Redriver Retimer/Redriver Uplink (Optical Interface) Uplink (Optical Interface) Optical Module Optical Module Retimer Retimer eFuse eFuse Sequencing & Monitoring Sequencing & Monitoring Logic Logic Power On Reset Power On Reset Sequencer Sequencer

Technical documentation

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Type Title Date
User guide Using the Fusion Digital Power Designer for TPS536xx VR13 Multiphase Solutions 27 Jan 2017
Application note How to use the LMK05318 as a jitter cleaner 27 Feb 2019
Application note Glitch free power sequencing with AXC level translators (Rev. A) 20 Sep 2018
User guide CC2640/CC2650 Bluetooth low energy Software Developer’s Guide (Rev. E) 20 Mar 2018
Technical article Stack current with PowerStack packages for higher power POL PDF | HTML 18 Aug 2023
Application note Interfacing Between LVPECL, VML, CML and LVDS Levels 16 Dec 2002
Technical article How to use PMBus power solutions for NXP QorIQ processors PDF | HTML 13 Sep 2023
Application note Multiphase Buck Design from Start to Finish, Part 1 (Rev. B) 11 May 2022
Application note Supported synchronization modes for TI network synchronizers (Rev. A) 11 May 2022
Application note Understanding clocking needs for high-speed 56G PAM-4 serial links (Rev. A) 11 May 2022
Technical article How to select the right power solution for your FPGA or PMIC PDF | HTML 08 Sep 2023
Analog Design Journal Understanding thermal-resistance specification of DC/DC convert. w/ MOSFETs 08 Jan 2018
White paper Internally compensated advanced current mode (ACM) (Rev. A) 07 Dec 2018
Analog Design Journal Comparing internally-compensated advanced current mode (ACM) w/ D-CAP3™ control (Rev. A) 06 Nov 2018
Technical article Powering high-current Broadcom networking processors in Ethernet switches PDF | HTML 05 Jul 2023

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