This universal buck converter reference design features a voltage mode buck converter in combination with a tiny, onboard electronics load to demonstrate the relationship in-between small-signal analysis in frequency domain (network analysis) and large signal analysis in time domain (transient response). The loop bandwidth has been squeezed to maximum with a crossover frequency at 20 kHz+. When using this converter design in mass production, it is recommended to use compensation values for a crossover frequency of 15 kHz with a safe-gain margin. In this design, the loop bandwidth has been exhausted to test Bode function of measurement equipment and demonstrate the impact of drain jitter (subharmonic noise) regarding power integrity.
| Output voltage options | PMP30595.1 |
|---|---|
| Vin (Min) (V) | 8 |
| Vin (Max) (V) | 16 |
| Vout (Nom) (V) | 5 |
| Iout (Max) (A) | 1 |
| Output Power (W) | 5 |
| Isolated/Non-Isolated | Non-Isolated |
| Input Type | DC |
| Topology | Buck- Non Sync |
A fully assembled board has been developed for testing and performance validation only, and is not available for sale.
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Test results for the reference design, including efficiency graphs, test prerequisites and more
Detailed schematic diagram for design layout and components
Complete listing of design components, reference designators, and manufacturers/part numbers
Detailed overview of design layout for component placement
Files used for 3D models or 2D drawings of IC components
Design file that contains information on physical board layer of design PCB
PCB layer plot file used for generating PCB design layout
Includes TI products in the design and potential alternatives.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Test report | Universal buck converter reference design for educational purposes | Mar. 08, 2019 |
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