This reference design generates a 12V/10A output from a standard 48V telecom input. The UCC2897A controls an active clamp forward converter power stage. The low gate charge and low RDSon of the CSD18531Q5A, implemented as self-driven synchronous rectifiers, provide for a highly efficient design. This design is laid out in a standard 1/8th brick footprint and includes enable, remote sense, and output overvoltage features.
| Output voltage options | PMP7451.1 |
|---|---|
| Vin (Min) (V) | 36 |
| Vin (Max) (V) | 75 |
| Vout (Nom) (V) | 12 |
| Iout (Max) (A) | 10 |
| Output Power (W) | 120 |
| Isolated/Non-Isolated | Isolated |
| Input Type | DC |
| Topology | Forward- Active Clamp^Forward- Synchronous |
A fully assembled board has been developed for testing and performance validation only, and is not available for sale.
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Test results for the reference design, including efficiency graphs, test prerequisites and more
Detailed schematic diagram for design layout and components
Complete listing of design components, reference designators, and manufacturers/part numbers
Design file that contains information on physical board layer of design PCB
Includes TI products in the design and potential alternatives.
| Type | Title | Date | ||
|---|---|---|---|---|
| Test report | PMP7451 Test Results | May 21, 2012 |
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