PMP9720

48V-60Vdc Input, 12V/150W Active Clamp Forward - Reference Design

PMP9720

Design files

Overview

This reference design generates a 12V/13A output from 54V DC input.  The UCC2897A controls an active clamp forward converter power stage.  The low gate charge and low RDSon of the CSD18532Q5B, implemented as self-driven synchronous rectifiers, allow this design to achieve a max load efficiency over 95%.  The compact UCC27511 drivers simplify the gate drive circuitry for the synchronous rectifiers.

Features
  • High Efficiency (over 95%)
  • Generates regulated 12V bus for telecom or server applications
  • Low profile, less than 0.5 inches (12.5mm) max component height
  • Self-driven synchronous rectifiers reduce drive complexity
Output voltage options PMP9720.1
Vin (Min) (V) 47
Vin (Max) (V) 60
Vout (Nom) (V) 12
Iout (Max) (A) 13
Output Power (W) 156
Isolated/Non-Isolated Isolated
Input Type DC
Topology Forward- Active Clamp^Forward- Synchronous
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A fully assembled board has been developed for testing and performance validation only, and is not available for sale.

Design files & products

Design files

Download ready-to-use system files to speed your design process.

TIDU539.PDF (4171 K)

Test results for the reference design, including efficiency graphs, test prerequisites and more

TIDRAK8.PDF (232 K)

Detailed schematic diagram for design layout and components

TIDRAK9.PDF (84 K)

Complete listing of design components, reference designators, and manufacturers/part numbers

TIDRAL0.PDF (85 K)

Detailed overview of design layout for component placement

TIDRAL2.ZIP (706 K)

Files used for 3D models or 2D drawings of IC components

TIDC631.ZIP (227 K)

Design file that contains information on physical board layer of design PCB

TIDRAL1.PDF (399 K)

PCB layer plot file used for generating PCB design layout

Products

Includes TI products in the design and potential alternatives.

AC/DC & DC/DC controllers (external FET)

UCC2897A110-V active clamp current mode PWM controller with P-channel clamp FET and line OV protection

Data sheet: PDF | HTML
Low-side drivers

UCC275114-A/8-A single-channel gate driver with 5-V UVLO, split outputs, and 13-ns Prop delay

Data sheet: PDF | HTML
MOSFETs

CSD18532Q5B60-V, N channel NexFET™ power MOSFET, single SON 5 mm x 6 mm, 3.2 mOhm

Data sheet: PDF | HTML

Technical documentation

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Type Title Date
* Test report PMP9720 Test Results Sep. 18, 2014

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