Hello. And welcome to the TI Precision Lab discussing op amp slew rate, part 2. In this video we'll discuss the body effect's impact on slew rate, take a look at settling time, discuss the differences between an amplifier's small signal and large signal step response, and relate small signal step response to stability.

The body effect is an example of a common secondary effect that influences slew rate. The body effect causes the slew rate of an amplifier to decrease with changing common mode voltage. The body effect is more pronounced in the non-inverting configuration. Because in this case, the common mode voltage changes with the input signal.

In this example, the non-inverting configuration shows a reduced slew rate for higher common mode voltages. The specified slew rate of an amplifier is typically measured in a non-inverting configuration, since this is the worst case condition. In the next slide we will explain what causes the body effect inside the IC. However, the key point to understand is that the body effect is one of several secondary effects that can influence slew rate.

Remember from the first slew rate video that each input pin of an op amp is connected to a transistor. Let's assume that these transistors are pMOS or a P-type MOSFET. Looking at a cross section of the pMOS, we see that the body is a deposit N-type material inside a P-type substrate. A P-type drain and source are then deposited inside the N-well. A diode is formed between the body and substrate, simply due to the existence of a P-N junction. The diode is normally reversed biased and has some amount of internal capacitance.

Changing the common mode voltage, which is the voltage across the P-N junction, will affect the amount of capacitance since the P-N junction's depletion region width will change.

Let's go back to the input stage of an op amp to see the implications that body capacitance has on slew rate. Like in the previous video, we apply a large signal step across the op amp's input pins. The transistor on the left is off. And the transistor on the right is fully on. So all input stage current IINPUT flows through the right transistor for maximum slew rate.

However, the body capacitance to ground provides a new current path, and reduces the amount of current IOUT flowing through the Miller capacitance C sub c. This reduced IOUT decreases the effective slew rate of the amplifier, since the voltage across the capacitor changes linearly with constant current.

In this example the body capacitance and Miller capacitance are both equal to 20 picofarads. So IOUT will become half of IINPUT, as long as the common mode voltage is not constant. The effective slew rate of the amplifier is then cut in half, since slew rate is equal to IOUT divided by C sub c. Note that the body capacitance will charge to the common mode voltage. Thus, if the common mode voltage is kept constant as in the case of the inverting configuration, the body capacitance will not affect the slew rate.

Let's now move on to discuss settling time. Settling time is the time required for the amplifier's output to reach and stay within a certain error band after a large signal step is applied to the input. This error band can either be specified in terms of percentage, or in terms of number of LSBs if you're trying to refer it to an analog to digital converter with a certain number of bits.

Because the input is a large signal step, the op amp is in slew rate limit. The tighter the error band, which means the smaller the error percentage allowed, the longer the settling time will be. Capacitance, closed loop gain and loading will also affect the settling time.

In many op amp data sheets the settling time versus closed loop gain is given as a plot, such as the one shown here. Again, settling time is longer for a tight error band, for example 0.01% compared to 0.1%. And this should make intuitive sense. Settling time also increases as gain increases. This is because the op amp's loop gain decreases as closed loop gain increases.

Remember, loop gain are the difference between open loop gain and closed loop gain, is what's used by the op amp to correct for errors. Having less loop gain makes it more difficult for the op amp to correct and settle quickly.

We can very easily simulate the settling time of an op amp using TINA-TI's transient analysis function. In order to do this, it is important to closely follow the data sheet test conditions, such as the input step size, gain configuration and load capacitance. In this case we are testing the OPA827 in a gain of minus 1 with a 10-volt step input, and 100 picofarads of load capacitance.

Let's take a closer look at the transient analysis of the a OPA827 settling. Please note that the settling time includes both the time required for the output to slew, as well as the time to settle within the specified error band. The time required to settle within the error band where we see the overshoot and damping oscillations, is difficult to see on this plot because of the time scale. So we'll zoom in on the error band region in the next few slides

Before we zoom in on the settling region though, let's first set up a representation of the error bands for easy visual analysis. This can be done using TINA's post processor function by adding horizontal lines for the VOUT values at plus or minus 0.01% of ideal. Since the ideal value is 10 volts, our error band values are 9.999 volts and 10.001 volts.

The settling behavior, with some overshoot and damped oscillations, can really be seen once we zoom in on the plot. In this example the output settles after an overshoot and one cycle of ringing, for a total settling time of about 400 nanoseconds. This is acceptably close to the typical data sheet value of 550 nanoseconds.

In our discussion of slew rate so far, we've been dealing with large input signals, often having amplitudes of 1 volt or greater. Let's now take a look at an op amp's behavior with a small signal step response at the input, where the amplitude is 100 millivolts or smaller. The key difference that I'll show in the next few slides is that unlike a large signal step input, a small signal step input does not put the op amp into slew rate limit.

Just like with large signal input steps, we can simulate the small signal rise time of an op amp using TINA. Here we show the simulation results for the OPA827 with a 100 millivolt input step. In the next slide we'll zoom in on the rising edge, so that we can accurately measure the small signal rise time.

So here we've zoomed in on the rising edge of the small signal step response. In the example we are calculating the rise time in volts per microsecond for comparison to the large signal slew rate. Measuring delta V over delta T, from 10% to 90% of the output swing, we get a rise time of 11.7 volts per microsecond. Compare this to the data sheet slew rate value of 28 volts per microsecond. And you can see that these are quite different.

Since the small signal input step doesn't actually put the op amp in a slew rate limit condition, the rise time does not match up with a slew rate spec. Where does the difference in these rise times come from? Well, as you may remember from the first slew rate video, a large signal input step puts an op amp in slew limit, and therefore forces it outside of its normal linear operation. A small signal step input, on the other hand, allows the op amp to operate in its linear region. And therefore the rise time is based on the op amp's bandwidth. We can support this claim using algebra.

First, let's start off with a standard definition of rise time, as the time required for the amplifier's output voltage to move from 10% to 90% of its ideal value. Next we can assume that the op amp's output behavior is essentially just a capacitor charging up. This is known as the first order response. That allows us to write an equation for VOUT based on the standard charging capacitor equation.

We ultimately want to solve for time, so we can say that at the times were interested in, VOUT is equal to 10% and 90% of VFINAL. We can now solve these two equations for time, and substitute them back into the original rise time definition, resulting in the equation t sub r equals 2.19 times tau.

Continuing the derivation, we recall that f sub c, or the cutoff frequency of the amplifier's closed loop bandwidth, is equal to 1 over 2 pi r times c. Well, tau equals rc. So we can substitute tau into this equation. Plugging in our result from the previous page that t sub r equals 2.19 times tau, we can now solve for t sub r, and ultimately conclude that the small signal step rise time is equal to 0.35 over f sub c.

Let's test this result against simulation data. Looking at the OPA2188 data sheet, we see that the op amp has a gain bandwidth of 2 megahertz. Our equation from the last slide gives us a calculated rise time of 175 nanoseconds. The simulation results in a rise time of 138 nanoseconds, which is an error of about 20%. This is decent enough for our approximation, since the real op amp is not just a first order system which we assumed to simplify the derivation, and also the simulation model has some limits on its overall accuracy.

An interesting point to make is that in our small signal rise time equation the only variable is the amplifier's band width. This implies that the rise time of a small signal step is independent of the size of the step. Of course, the amplitude of the input must not exceed 100 millivolts, or the input is no longer considered to be small signal.

We can test this in simulation, which was done by measuring rise time with different input step amplitudes from 10 millivolts to 100 millivolts. As you can see, the rise time for each case is the same.

However, for a large signal step, the rise time is dependent on the input step size. This is because the op amp is in its slew rate limited operation, and can only change its output voltage at a fixed rate. In this example, the slew rate is equal to 0.8 volts per microsecond. And we can see that the rise times increase as the input step size increases.

The small signal step response can also be used to judge the stability of the system. In general, any second or third order system response, such as an op amp, can be tested for stability by applying a square wave at the input, and observing the behavior of the output. In the case of the op amp, care must be taken to ensure that the op amp is linearly amplifying the signal. This means that a large signal input step cannot be used, since in that case the op amp will be in slew limit, and not be operating linearly. Rather, a small signal input step must be used.

As a general rule, a larger overshoot on the output implies that the op amp is less stable. In this example using the OPA827, the maximum capacitance for a stable response is 1,000 picofarads. This corresponds to about 60% overshoot.

This final slide gives a little bit more detail on overshoot instability, showing equations for the transfer function of a second order system in both the frequency domain and time domain. Plugging in different values of zeta, or the damping factor, into the time domain equation gives the plot on the right, which predicts the system's overshoot. Stability is a very deep concept, which is covered in depth by later videos. So I won't go into more detail in this particular module.

That concludes this video. Thank you very much for watching. Please try the quiz to check your understanding of this video's content.