SBAS661 Data sheet

SBAS661C February 2015 – May 2021 ADS1262 , ADS1263

PRODUCTION DATA

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PW|28
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Thermal pad, mechanical data (Package|Pins)

Orderable Information

9.3.10.3 50-Hz and 60-Hz Line Cycle Rejection

If the ADC connection leads are in close proximity to industrial motors and conductors, coupling of 50-Hz and 60-Hz power line frequencies can occur. The coupled noise interferes with the signal voltage, and may lead to inaccurate or unstable conversions. The digital filter provides enhanced rejection of power-line coupled noise for data rates of 60 SPS and less. Program the filter to tradeoff data rate and conversion latency versus the desired level of line cycle rejection. Table 9-6 summarizes the ADC1 50-Hz and 60-Hz line-cycle rejection based on 2% and 6% ratio tolerance of power-line to ADC clock frequency. Best possible power line rejection is provided by the high-order sinc filter and by using an accurate ADC clock.

Table 9-6 50-Hz and 60-Hz Line Cycle Rejection

DATA RATE (SPS)	FILTER TYPE	DIGITAL FILTER Response (dB)
DATA RATE (SPS)	FILTER TYPE	50 Hz ±2%	60 Hz ±2%	50 Hz ±6%	60 Hz ±6%
2.5	FIR	–113	–99	–88	–80
2.5	Sinc1	–36	–37	–40	–37
2.5	Sinc2	–72	–74	–80	–74
2.5	Sinc3	–108	–111	–120	–111
2.5	Sinc4	–144	–148	–160	–148
5	FIR	–111	–95	–77	–76
5	Sinc1	–34	–34	–30	–30
5	Sinc2	–68	–68	–60	–60
5	Sinc3	–102	–102	–90	–90
5	Sinc4	–136	–136	–120	–120
10	FIR	–111	–94	–73	–68
10	Sinc1	–34	–34	–25	–25
10	Sinc2	–68	–68	–50	–50
10	Sinc3	–102	–102	–75	–75
10	Sinc4	–136	–136	–100	–100
16.6	Sinc1	–34	–21	–24	–21
16.6	Sinc2	–68	–42	–48	–42
16.6	Sinc3	–102	–63	–72	–63
16.6	Sinc4	–136	–84	–96	–84
20	FIR	–95	–94	–66	–66
20	Sinc1	–18	–34	–18	–24
20	Sinc2	–36	–68	–36	–48
20	Sinc3	–54	–102	–54	–72
20	Sinc4	–72	–136	–72	–96
50	Sinc1	–34	–15	–24	–15
50	Sinc2	–68	–30	–48	–30
50	Sinc3	–102	–45	–72	–45
50	Sinc4	–136	–60	–96	–60
60	Sinc1	–13	–34	–12	–24
60	Sinc2	–27	–68	–24	–48
60	Sinc3	–40	–102	–36	–72
60	Sinc4	–53	–136	–48	–96