SBASAW1A September   2023  – December 2023 AMC21C12

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information 
    5. 5.5 Package Characteristics
    6. 5.6 Electrical Characteristics
    7. 5.7 Switching Characteristics 
    8. 5.8 Timing Diagrams
    9. 5.9 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Analog Input
      2. 6.3.2 Reference Input
      3. 6.3.3 Isolation Channel Signal Transmission
      4. 6.3.4 Open-Drain Digital Output
        1. 6.3.4.1 Transparent Output Mode
        2. 6.3.4.2 Latch Output Mode
      5. 6.3.5 Power-Up and Power-Down Behavior
      6. 6.3.6 VDD1 Brownout and Power-Loss Behavior
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Overcurrent Detection
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Overvoltage Detection
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Curves
    3. 7.3 Best Design Practices
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DEN|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.2.2.2 Detailed Design Procedure

The trip threshold of the isolated comparator is determined by the external resistor R1 and the internal 100-μA current source of the AMC21C12. R1 is calculated as (VTRIP – VHYS) / IREF = (2 V – 25 mV) / 100 μA = 19.75 kΩ. The comparator hysteresis voltage (VHYS) is subtracted from VTRIP because the comparator trips at VREF + VHYS, see Figure 6-1. The hysteresis value is 25 mV because the reference voltage is greater than 550 mV, as explained in the Reference InputAnalog InputReference InputReference InputReference Input section. R1 is rounded up to the next closest value in the E96 series of 20 kΩ, resulting in a trip threshold (input rising) of 2.025 V. This value is the target value for the voltage across R6 at the power-good threshold of 38 V.

The 500-μA cross-current requirement through the resistive divider (R5 and R6) at a nominal supply voltage (48 V) determines that the total impedance of the resistor divider is 48 V / 500 μA = 96 kΩ. At the target power-good threshold of 38 V, the current through the resistive divider is 38 V / 48 V × 500 μA = 395.8 μA and R6 is calculated as 2.025 V / 395.8 μA = 5.115 kΩ. The closest value in the E96 series is 4.99 kΩ. R5 is calculated as 96 kΩ – 4.99 kΩ = 91.01 kΩ. The closest value in the E96 series is 88.7 kΩ

Table 7-4 summarizes the key parameters of the design.

Table 7-4 Overvoltage and Undervoltage Detection Design Example
PARAMETER VALUE
Reference resistor value (R1) 20.0 kΩ
R5 resistor value 88.7 kΩ
R6 resistor value 4.99 kΩ
Reference voltage (VREF) 2000 mV
Reference voltage settling time at power-up(1) 4.6 ms
Power-good trip threshold (rising) 38.0 V
Power-good trip threshold (falling) 37.5 V
(1) Settling time to 90% of final value. Determined by simulation. Settling time must be considered during power-up, as explained in the Reference InputAnalog InputReference InputReference InputReference Input section.