SNVSB12B November   2017  – May 2021 LM73605-Q1 , LM73606-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Characteristics
    7. 7.7 Switching Characteristics
    8. 7.8 System Characteristics
    9. 7.9 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Synchronous Step-Down Regulator
      2. 8.3.2  Auto Mode and FPWM Mode
      3. 8.3.3  Fixed-Frequency Peak Current-Mode Control
      4. 8.3.4  Adjustable Output Voltage
      5. 8.3.5  Enable and UVLO
      6. 8.3.6  Internal LDO, VCC_UVLO, and BIAS Input
      7. 8.3.7  Soft Start and Voltage Tracking
      8. 8.3.8  Adjustable Switching Frequency
      9. 8.3.9  Frequency Synchronization and Mode Setting
      10. 8.3.10 Internal Compensation and CFF
      11. 8.3.11 Bootstrap Capacitor and VBOOT-UVLO
      12. 8.3.12 Power-Good and Overvoltage Protection
      13. 8.3.13 Overcurrent and Short-Circuit Protection
      14. 8.3.14 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Standby Mode
      3. 8.4.3 Active Mode
        1. 8.4.3.1 CCM Mode
        2. 8.4.3.2 DCM Mode
        3. 8.4.3.3 PFM Mode
        4. 8.4.3.4 Fault Protection Mode
  9. 9 Layout
    1. 9.1 Layout Guidelines
      1. 9.1.1 Layout For EMI Reduction
      2. 9.1.2 Ground Plane
      3. 9.1.3 Optimize Thermal Performance
    2. 9.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
      2. 10.1.2 Development Support
        1. 10.1.2.1 Custom Design With WEBENCH® Tools
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Receiving Notification of Documentation Updates
    5. 10.5 Support Resources
    6. 10.6 Support Resources
    7. 10.7 Trademarks
    8. 10.8 Electrostatic Discharge Caution
    9. 10.9 Glossary

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.8 Adjustable Switching Frequency

The internal oscillator frequency is controlled by the impedance on the RT pin. If the RT pin is open circuit, the LM73605-Q1/6-Q1 at default switching frequency, 500 kHz. The RT pin is not designed to be connected directly to ground. To program the switching frequency by RT resistor, Equation 13, or Figure 8-12, or Table 8-1 can be used to find the resistance value.

Equation 13. GUID-69A6E5AA-D998-4BC3-B564-29308E1798E3-low.gif
GUID-47B5292B-C8C9-445D-9308-5DD42FF089BD-low.gif Figure 8-12 RT Resistance versus Switching Frequency
Table 8-1 Typical Frequency Setting Resistance
SWITCHING FREQUENCY fSW (kHz)RT RESISTANCE (kΩ)
350115
400100
50078.7 (or open)
75052.3
100039.2
150026.1
200019.1
220017.4

The choice of switching frequency is usually a compromise between conversion efficiency and the size of the solution. Lower switching frequency has lower switching losses (including gate charge losses, switch transition losses, and so forth) and usually results in higher overall efficiency. However, higher switching frequency allows the use of smaller power inductor and output capacitors, hence a more compact design. Lower inductance also helps transient response (higher large signal slew rate of inductor current), and has lower DCR. The optimal switching frequency is usually a trade-off in a given application and thus needs to be determined on a case-by-case basis. The following are factors that need to be taken into account:

  • Input voltage range
  • Output voltage
  • Most frequent load current level or levels
  • External component choices
  • Solution size/cost requirements
  • Efficiency
  • Thermal management requirements

The choice of switching frequency can also be limited whether an operating condition triggers tON-MIN or tOFF-MIN. Minimum on-time, tON-MIN, is the smallest time that the HS switch can be on. Minimum off-time, tOFF-MIN, is the smallest duration that the HS switch can be off.

In CCM operation, tON-MIN and tOFF_MIN limit the voltage conversion range given a selected switching frequency, fSW. The minimum duty cycle allowed is:

Equation 14. DMIN = tON-MIN × fSW

The maximum duty cycle allowed is:

Equation 15. DMAX = 1 – tOFF-MIN × fSW

Given an output voltage, the choice of the switching frequency affects the allowed input voltage range, solution size and efficiency. The maximum operational supply voltage can be found by:

Equation 16. VIN_MAX = VOUT / (fSW × tON-MIN)

At lower supply voltage, the switching frequency decreases once tOFF-MIN is tripped. The minimum VIN without frequency foldback can be approximated by:

Equation 17. VIN_MIN = VOUT / (1 – fSW × tOFF-MIN)

With a desired VOUT, the range of allowed VIN is narrower with higher switching frequency.

The LM73605-Q1/6-Q1 an advanced frequency foldback algorithm under both tON_MIN and tOFF_MIN conditions. With frequency foldback, stable output voltage regulation is extended to wider range of supply voltages.

At very high VIN conditions where tON-MIN limitation is met, the switching frequency reduces to allow higher VIN while maintaining VOUT regulation. Note that the peak-to-peak inductor current ripple will increase with higher VIN and lower frequency. TI does not recommend designing the circuit to operate with tON_MIN under typical conditions.

At very low VIN conditions, where tOFF-MIN limitation is met, the switching frequency decreases until tON-MAX condition is met. Such frequency foldback mechanism allows the LM73605-Q1/6-Q1 to have very low dropout voltage regardless of frequency setting.