SBOS382H may   2008  – june 2023 OPA2673

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Device Family Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: Full Bias and Offline Mode VS = ±6 V
    6. 7.6  Electrical Characteristics: 75% Bias Mode VS = ±6 V
    7. 7.7  Electrical Characteristics: 50% Bias Mode VS = ±6 V
    8. 7.8  Typical Characteristics: VS = ±6 V, Full Bias
    9. 7.9  Typical Characteristics: VS = ±6 V Differential, Full Bias
    10. 7.10 Typical Characteristics: VS = ±6 V, 75% Bias
    11. 7.11 Typical Characteristics: VS = ±6 V, 50% Bias
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Operating Suggestions
        1. 8.3.1.1 Setting Resistor Values to Optimize Bandwidth
        2. 8.3.1.2 Output Current and Voltage
        3. 8.3.1.3 Driving Capacitive Loads
        4. 8.3.1.4 Line Driver Headroom Model
        5. 8.3.1.5 Noise Performance
    4. 8.4 Device Functional Modes
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 High-Speed Active Filter
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 PLC Line Driver
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Thermal Analysis
      2. 9.3.2 Input and ESD Protection
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
        1. 10.1.1.1 TINA-TI™ Simulation Software (Free Download)
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Revision History

Changes from Revision G (December 2021) to Revision H (June 2023)

  • Changed Figure 7-15, Open-Loop Transimpedance Gain and Phase for accuracyGo

Changes from Revision F (April 2010) to Revision G (December 2021)

  • Added Device Information table, Pin Functions table, ESD Ratings table, Recommended Operating Conditions table, Thermal Information table, Overview section, Functional Block Diagram section, Feature Description section, Device Functional Modes section, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go
  • Updated the numbering format for tables, figures, and cross-references throughout the documentGo
  • Changed the title of the Related Products section to Device Family Comparison Table Go
  • Deleted Package/Ordering Information tableGo
  • Changed the title of the Pin Configuration section to Pin Configuration and Functions Go
  • Changed QFN to VQFN throughout the documentGo
  • Changed all input pin current limit from ±30 mA to ±10 mAGo
  • Added new thermal metric tableGo
  • Changed SSBW across temperaure at G = 4 V/V from 260 MHz to 300 MHzGo
  • Changed SSBW across temperaure at G = 8 V/V from 260 MHz to 300 MHzGo
  • Added new specifications for LSBW at gain of 9 V/V and 8 V/VGo
  • Changed LSBW at G = 4 V/V from 300 MHz to 144 MHz Go
  • Changed Slew Rate specification from 3000 V/µs to 3500 V/µsGo
  • Changed HD2 from -68 dBc to -70 dBcGo
  • Changed HD3 from -72 dBc to -73 dBcGo
  • Changed noninverting input current noise from 5.2 pA/√Hz to 3 pA/√HzGo
  • Changed inverting input current noise from 35 pA/√Hz to 25 pA/√HzGo
  • Changed crosstalk from -92 dBc to -85 dBcGo
  • Changed typical noninverting input resistance from 1.5 MΩ to 3 MΩGo
  • Changed minimum inverting input resistance from 16Ω to 10ΩGo
  • Changed typical short circuit current limit from ±800 mA to ±1000 mAGo
  • Changed typical closed-loop output impedance from 10 mΩ to 0.4 mΩGo
  • Changed maximum quiescent current at full bias from 38 mA to 42 mAGo
  • Changed maximum quiescent current across temperature at full bias from 42 mA to 46 mA Go
  • Added +PSRR specificationGo
  • Added AC performance data at 75% BiasGo
  • Changed HD3 spec at 75% bias from -66 dBc to -72 dBcGo
  • Changed maximum quiescent current at 75% bias from 29 mA to 31 mAGo
  • Added AC performance data at 50% BiasGo
  • Changed HD3 spec at 50% bias from -60 dBc to -70 dBcGo
  • Quiescent current at 75% and 50% bias condition at room temperature and across temperature increased by 2mAGo
  • Changed maximum quiescent current at full bias from 19 mA to 21 mAGo

Changes from Revision E (April 2010) to Revision F (May 2010)

  • Added minimum operating voltage (single supply) parameterGo

Changes from Revision D (January 2010) to Revision E (April 2010)

  • Revised Absolute Maximum Ratings table; deleted lead temperature specification, changed storage temperature range from -40°C to -65°CGo