SBOS771B December   2016  – November 2024 OPA4277-SP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
    1. 4.1 Bare Die Information
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input Protection
      2. 6.3.2 Input Bias Current Cancellation
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • JDJ|28
  • HFR|14
  • KGD|0
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.5 Electrical Characteristics

at TJ = 25°C, VS = ±5 V to ±15 V, and RL = 2 kΩ (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage TJ = 25°C, pre- and post-irradiated ±20 ±65 µV
TJ = –55°C to +125°C, pre-irradiated ±140
dVOS/dT Input offset voltage temperature drift TJ = –55°C to +125°C, pre-irradiated ±0.15 µV/°C
Input offset voltage long-term stability 0.2 µV/mo
PSRR Power-supply rejection ratio
VS = ±2 V to ±18 V,
TJ = 25°C, pre- and post-irradiated		 ±0.3 ±1 µV/V
VS = ±2 V to ±18 V,
TJ = –55°C to +125°C		 ±1
Channel separation dc 0.1 µV/V
INPUT BIAS CURRENT
IB Input bias current TJ = –55°C to +125°C ±17.5 nA
TJ = 25°C, pre- and post-irradiated ±17.5
IOS Input offset current TJ = –55°C to +125°C ±17.5 nA
TJ = 25°C, pre- and post-irradiated ±17.5
NOISE
Input voltage noise ƒ = 0.1 to 10 Hz 0.22 µVpp
Input voltage noise density ƒ = 10 Hz 12 nV/√ Hz
ƒ = 100 Hz 8
ƒ = 1 kHz 8
ƒ = 10 kHz 8
in Input noise current density ƒ = 1 kHz 0.2 fA/√ Hz
INPUT VOLTAGE
VCM Common-mode voltage range TJ = 25°C, pre- and post-irradiated (V–) + 2 (V+) – 2 V
CMRR Common-mode rejection ratio (V–) + 2 V < VCM < (V+) – 2 V,
TJ = 25°C, pre- and post-irradiated, JDJ package and KGD		 114 140 dB
(V–) + 2 V < VCM < (V+) – 2 V,
TJ = –55°C to +125°C,
JDJ package and KGD		 114
(V–) + 2 V < VCM < (V+) – 2 V,
TJ = 25°C, pre- and post-irradiated, HFR package		 100 121
(V–) + 2 V < VCM < (V+) – 2 V,
TJ = –55°C to +125°C, HFR package		 100
INPUT IMPEDANCE
Differential 100 || 3 MΩ || pF
Common mode (V–) + 2 V < VCM < (V+) – 2 V 250 || 3 GΩ || pF
FREQUENCY RESPONSE
GBW Gain-bandwidth product 1 MHz
SR Slew rate 0.8 V/µs
Settling time 0.1%, 10-V step, VS = ±15 V, G = 1 14 µs
0.01%, 10-V step, VS = ±15 V, G = 1 16
THD + N Total harmonic distortion + noise 1 kHz, G = 1, VO = 3.5 Vrms 0.002%
OPEN-LOOP GAIN
AOL Open-loop voltage gain VO = (VO–) + 0.5 V to (VO+) – 1.2 V,
RL = 10 kΩ		 140 dB
VO = (VO–) + 1.5 V to (VO+) – 1.5 V,
RL = 2 kΩ, TJ = 25°C,
pre- and post-irradiated,
JDJ package and KGD		 118 134
VO = (VO–) + 1.5 V to (VO+) – 1.5 V,
RL = 2 kΩ, TJ = –55°C to +125°C, JDJ package and KGD		 118 134
VO = (VO–) + 1.5 V to (VO+) – 1.5 V,
RL = 2 kΩ, TJ = 25°C,
pre- and post-irradiated,
HFR package		 100 123
VO = (VO–) + 1.5 V to (VO+) – 1.5 V,
RL = 2 kΩ, TJ = –55°C to +125°C, HFR package		 100 123
VO = (VO–) + 3.4 V to (VO+) – 3.4 V,
RL = 600 Ω, VS = ±7 V, TJ = 25°C,
pre- and post-irradiated,
JDJ package and KGD		 118 134
VO = (VO–) + 3.4 V to (VO+) – 3.4 V,
RL = 600 Ω, VS = ±7 V,
TJ = –55°C to +125°C,
JDJ package and KGD		 118 134
VO = (VO–) + 3.4 V to (VO+) – 3.4 V,
RL = 600 Ω, VS = ±7 V, TJ = 25°C,
pre- and post-irradiated,
HFR package		 90 114
VO = (VO–) + 3.4 V to (VO+) – 3.4 V,
RL = 600 Ω, VS = ±7 V,
TJ = –55°C to +125°C, HFR package		 90 114
OUTPUT
VO Output voltage RL = 10 kΩ, TJ = 25°C,
pre- and post-irradiated		 (V–) + 0.5 (V+) – 1.2 V
RL = 10 kΩ, TJ = –55°C to +125°C (V–) + 0.5 (V+) – 1.2
RL = 2 kΩ, TJ = 25°C,
pre- and post-irradiated		 (V–) + 1.5 (V+) – 1.5
RL = 2 kΩ, TJ = –55°C to +125°C (V–) + 1.5 (V+) – 1.5
TJ = 25°C, RL = 600 Ω,
pre- and post-irradiated		 (V–) + 3.4 (V+) – 3.4
RL = 600 Ω, VS = ±7 V,
TJ = –55°C to +125°C		 (V–) + 3.4 (V+) – 3.4
ISC Short-circuit current ±35 mA
CLOAD Capacitive load drive ƒ = 350 kHz, IO = 0 mA See Section 5.6
POWER SUPPLY
IQ Quiescent current per amplifier IO = 0 mA, TJ = 25°C,
pre- and post-irradiated		 ±790 ±850 µA
IO = 0 mA, TJ = –55°C to +125°C ±900