SLLS067I August   1990  – October 2022 SN55LBC176 , SN65LBC176 , SN75LBC176

PRODUCTION DATA  

  1. Features
  2. Description
  3. Revision History
  4. Description (Continued)
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Conditions
    3. 6.3 Thermal Information: SN55LBC176
    4. 6.4 Thermal Information: SN65LBC176, SN75LBC176
    5. 6.5 Dissipation Ratings
    6. 6.6 Driver Electrical Characteristics
    7. 6.7 Driver Switching Characteristics
    8. 6.8 Receiver Electrical Characteristics
    9. 6.9 Receiver Switching Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Functional Block Diagram
    2. 8.2 Device Functional Modes
  9. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Thermal Characteristics of IC Packages
    2. 9.2 Trademarks
    3. 9.3 Electrostatic Discharge Caution
    4. 9.4 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Description

The SN55LBC176, SN65LBC176, SN65LBC176Q, and SN75LBC176 differential bus transceivers are monolithic, integrated circuits designed for bidirectional data communication on multipoint bus-transmission lines. They are designed for balanced transmission lines and meet ANSI Standard
TIA/EIA−485−A (RS-485) and ISO 8482:1987(E).

The SN55LBC176, SN65LBC176, SN65LBC176Q, and SN75LBC176 combine a 3-state, differential line driver and a differential input line receiver, both of which operate from a single 5-V power supply. The driver and receiver have active-high and active-low enables, respectively, which can externally connect together to function as a direction control. The driver differential outputs and the receiver differential inputs connect internally to form a differential input/output (I/O) bus port that is designed to offer minimum loading to the bus whenever the driver is disabled or VCC = 0. This port features wide positive and negative common-mode voltage ranges, making the device suitable for party-line applications. Low device supply current can be achieved by disabling the driver and the receiver.

Package Information
PART NUMBER PACKAGE(1) BODY SIZE (NOM)
SN55LBC176 LCCC (20) 8.89 mm x 8.89 mm
CDIP (8) 9.60 mm x 6.67 mm
SN65LBC176 SOIC (8) 4.90 mm x 3.91 mm
PDIP (8) 9.81 mm x 6.35 mm
SN75LBC176 SOIC (8) 4.90 mm x 3.91 mm
PDIP (8) 9.81 mm x 6.35 mm
For all available packages, see the orderable addendum at the end of the data sheet.
GUID-A3E6FB75-8756-4167-A605-0E0E13B09154-low.gif Figure 2-1 Logic Diagram (Positive Logic)