SLLS067I August 1990 – October 2022 SN55LBC176 , SN65LBC176 , SN75LBC176
PRODUCTION DATA
- 1 Features
- 2 Description
- 3 Revision History
- 4 Description (Continued)
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 Recommended Operating Conditions
- 6.3 Thermal Information: SN55LBC176
- 6.4 Thermal Information: SN65LBC176, SN75LBC176
- 6.5 Dissipation Ratings
- 6.6 Driver Electrical Characteristics
- 6.7 Driver Switching Characteristics
- 6.8 Receiver Electrical Characteristics
- 6.9 Receiver Switching Characteristics
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Device and Documentation Support
- 10Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information
7 Parameter Measurement Information
Figure 7-1 Driver
VOD and VOC
Figure 7-2 Driver
VOD3
Figure 7-3 Driver
Test Circuit and Voltage Waveforms
Figure 7-4 Driver
Test Circuit and Voltage Waveforms
Figure 7-5 Driver
Test Circuit and Voltage WaveformsA. The input pulse is supplied by a
generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle,
tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω.
B. CL includes probe and jig
capacitance.
Figure 7-6 Receiver
VOH and VOL
Figure 7-7 Receiver
Test Circuit and Voltage WaveformsC. The input pulse is supplied by a
generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle,
tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω.
D. CL includes probe and jig
capacitance.
A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 7-8 Receiver Test Circuit and Voltage Waveforms