4 Revision History
Changes from Revision B (November 2022) to Revision C (May 2023)
- Changed the reset value of MR2 register from 04h to
06hGo
- Changed the reset value for the MR2 DEV_REV_MINOR[2:0] bit from 010
to 011Go
Changes from Revision A (February 2022) to Revision B (November 2022)
- Changed Device Information table to Package
Information
Go
- Updated typical IQ from 4.7 µA to 8.3 µAGo
- Updated max IQ from 10 µA to 12.4 µA Go
- Updated test condition for IDDR and typical currentGo
- Updated test condition for IDDW and typical currentGo
- Updated typical active current from 92 µA to 99 µA Go
- Updated typical standby current from 0.6 µA to 4 µAGo
- Updated max standby current from 4 µA to 6.5 µA Go
- Updated tSUSTA in I3C mode from 19.2 ns to 12 ns to match JESD302-1Go
- Updated tHDSTA in I3C mode from 38.4 ns to 30 ns to match JESD302-1Go
- Updated tSUSTO in I3C mode from 19.2 ns to 12 ns to match JESD302-1Go
- Changed Figure 6-8 through Figure 6-12
Go
- Moved the Power Supply Recommendationsand Layout sections to
the Application and Implementation sectionGo
Changes from Revision * (December 2020) to Revision A (February 2022)
- Changed the reset value of MR2 register from 02h to
04hGo
- Changed the DEF_ADDR_POINT_EN bit descriptionGo
- Changed the address in the MR7 register descriptionGo