SLVSGG6B april   2022  – june 2023 TPS25981

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
      1.      16
    8. 7.8 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Undervoltage Lockout (UVLO and UVP)
      2. 8.3.2 Overvoltage Lockout (OVLO)
      3. 8.3.3 Inrush Current, Overcurrent, and Short-Circuit Protection
        1. 8.3.3.1 Slew Rate (dVdt) and Inrush Current Control
        2. 8.3.3.2 Circuit-Breaker During Steady-State
        3. 8.3.3.3 Active Current Limiting During Start-Up
        4. 8.3.3.4 Short-Circuit Protection
      4. 8.3.4 Analog Load Current Monitor
      5. 8.3.5 Overtemperature Protection (OTP)
      6. 8.3.6 Fault Response and Indication (FLT)
      7. 8.3.7 Power Good Indication (PG)
      8. 8.3.8 Quick Output Discharge (QOD)
      9. 8.3.9 Reverse Current Blocking FET Driver
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Single Device, Self-Controlled
      2. 9.1.2 Parallel Operation
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Device Selection
        2. 9.2.2.2 Setting Output Voltage Rise Time (tR)
        3. 9.2.2.3 Setting Overcurrent Threshold (ILIM)
        4. 9.2.2.4 Setting Overcurrent Blanking Interval (tITIMER)
        5. 9.2.2.5 Voltage Drop
      3. 9.2.3 Application Curves
  11. 10Power Supply Recommendations
    1. 10.1 Transient Protection
    2. 10.2 Output Short-Circuit Measurements
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

GUID-20220117-SS0I-PXR6-V5GT-GXBQJ8XNZT9G-low.gifFigure 6-1 TPS25981xx RPW Package 10-Pin QFN Top View
Table 6-1 Pin Functions
PINTYPEDESCRIPTION
NAMENO.
EN/UVLO

1

Analog InputActive high enable for the device. A resistor divider on this pin from input supply to GND can be used to adjust the undervoltage lockout threshold. Do not leave floating. Refer to Undervoltage Lockout (UVLO and UVP) for details.

EN/OVLO

2

Analog InputA resistor divider on this pin from supply to GND can be used to adjust the overvoltage lockout threshold. This pin can also be used as an Active low enable for the device. Do not leave floating. Refer to Overvoltage Lockout (OVLO) for details.

PG

3

Digital Output

Power Good indication.

This pin is an open-drain signal which is asserted high when the power FET has fully turned ON and is ready to deliver power. Refer to Power Good (PG) for more details.

FLT

4

Digital OutputActive low fault event indicator. This pin is an open-drain signal which is pulled low when a fault is detected. Refer to Fault Response and Indication (FLT) for more details.

IN

5

Power

Power input

OUT

6

Power

Power output

DVDT

7

Analog OutputA capacitor from this pin to GND sets the output turn on slew rate. Leave this pin floating for the fastest turn-on slew rate. Refer to Slew Rate (dVdt) and Inrush Current Control for details.

Only for TPS259813x variants, this pin can also be used to drive an external FET to implement reverse current blocking. Please refer to Reverse Current Blocking FET Driver for more details.

GND

8

Ground

This pin is the ground reference for all internal circuits and must be connected to system GND.

ILM

9

Analog OutputThis pin is a dual function pin used to limit and monitor the output current. An external resistor from this pin to GND sets the overcurrent protection threshold during start-up as well as steady-state. The pin voltage can also be used as analog output load current monitor signal. Do not leave floating. Refer to Circuit-Breaker During Steady-state or Active Current Limiting During Start-up for more details.

ITIMER

10

Analog OutputA capacitor from this pin to GND sets the overcurrent blanking interval during which the output current can temporarily exceed set current limit (but lower than fast-trip threshold) during steady-state before the device overcurrent response takes action. Leave this pin open for fastest response to overcurrent events. Refer to Circuit-Breaker During Steady-state for more details.