SLVSFS3B September 2020 – July 2021 TPS62868 , TPS62869
PRODUCTION DATA
The TPS62868 and TPS62869 families provide device options with the PG pin instead of a VSET/VID pin. Refer to Section 5 to see the according device options.
The PG pin goes high impedance once the output voltage is above 91% and less than 110% of the nominal voltage, and is driven low once the voltage is out of the range. The PG pin is an open-drain output and is specified to sink up to 1 mA. The power good output requires a pullup resistor connecting to any voltage rail less than 5.5 V. The PG signal can be used for sequencing of multiple rails by connecting it to the EN pin of other converters. Leave the PG pin unconnected when not used.
The PG has a deglitch time, before the signal goes high or low, during normal operation.
DEVICE CONDITIONS | LOGIC STATUS | ||
---|---|---|---|
HIGH | LOW | ||
Enable | 0.91 × VOUT_NOM ≤ VVOS ≤ 1.11 × VOUT_NOM | √ | |
VVOS < 0.91 × VOUT_NOM or VVOS > 1.11 × VOUT_NOM | √ | ||
Shutdown | EN = Low | √ | |
Thermal Shutdown | TJ > TJSD | √ | |
UVLO | 1.8 V < VIN < VUVLO | √ | |
Power Supply Removal | VIN < 1.8 V | undefined |