SLVSDW6 Data sheet

SLVSDW6C April 2017 – April 2021 TPS7H1101A-SP

PRODUCTION DATA

Package Options

Mechanical Data (Package|Pins)

HKR|16
- MCDF012C
KGD|0

Thermal pad, mechanical data (Package|Pins)

Orderable Information

6.5 Electrical Characteristics

1.5 V ≤ V_IN ≤ 7 V, V_OUT(target) = V_IN – 0.35 V, I_OUT = 10 mA, V_EN = 1.1 V, C_OUT = 22 µF, PG terminal pulled up to V_IN with
50 kΩ, over operating temperature range (T_J = –55°C to 125°C), unless otherwise noted. Typical values are at T_J = 25°C.

PARAMETER		TEST CONDITIONS		MIN	TYP	MAX	UNIT
V_IN	Input voltage range			1.5		7	V
V_FB	Feedback terminal voltage⁽¹⁾	0 A ≤ I_OUT ≤ 3 A, 1.5 V ≤ V_IN ≤ 7 V		0.594	0.605	0.616	V
V_OUT	Output voltage range			0.8		V_IN	V
	Output voltage accuracy⁽¹⁾	0 A ≤ I_OUT ≤ 3 A, 1.5 V ≤ V_IN ≤ 7 V, V_OUT = 0.8 V, 1.2 V, 1.8 V, 6.65 V		–2%		2%
ΔV_OUT%/ ΔV_IN	Line regulation	1.5 V ≤ V_IN ≤ 7 V		–0.07	0.01	0.07	%/V
ΔV_OUT%/ ΔI_OUT	Load regulation	0.8 V ≤ V_OUT ≤ 6.65 V, 0 ≤ I_Load ≤ 3 A			0.08		%/A
ΔV_OUT	DC input line regulation	1.5 V ≤ V_IN ≤ 7 V, V_OUT = 0.8 V, 1.2 V, 1.8 V, I_OUT = 10 mA, T_J = –55°C⁽²⁾			0.5	3	mV
		1.5 V ≤ V_IN ≤ 7 V, V_OUT = 0.8 V, 1.2 V, 1.8 V, I_OUT = 10 mA, T_J = 25°C⁽²⁾			0.2	0.6
		1.5 V ≤ V_IN ≤ 7 V, V_OUT = 0.8 V, 1.2 V, 1.8 V, I_OUT = 10 mA, T_J = 125°C⁽²⁾			0.2	1
ΔV_O	DC output load regulation⁽³⁾	V_OUT = 0.8 V, 0 ≤ I_Load ≤ 1 A, T_J = –55°C⁽²⁾			0.4	1	mV
		V_OUT = 0.8 V, 0 ≤ I_Load ≤ 1 A, T_J = 25°C⁽²⁾			0.6	1.1
		V_OUT = 0.8 V, 0 ≤ I_Load ≤ 1 A, T_J = 125°C⁽²⁾			0.8	1.3
		V_OUT = 0.8 V, 0 ≤ I_Load ≤ 2 A, T_J = –55°C⁽²⁾			0.8	1.8
		V_OUT = 0.8 V, 0 ≤ I_Load ≤ 2 A, T_J = 25°C⁽²⁾			1.3	1.8
		V_OUT = 0.8 V, 0 ≤ I_Load ≤ 2 A, T_J = 125°C⁽²⁾			1.6	2.4
		V_OUT = 0.8 V, 0 ≤ I_Load ≤ 3 A, T_J = –55°C⁽²⁾			1.1	1.9
		V_OUT = 0.8 V, 0 ≤ I_Load ≤ 3 A, T_J = 25°C⁽²⁾			1.9	2.6
		V_OUT = 0.8 V, 0 ≤ I_Load ≤ 3 A, T_J = 125°C⁽²⁾			2.5	3.4
		V_OUT = 1.2 V, 0 ≤ I_Load ≤ 1 A, T_J = –55°C⁽²⁾			0.3	1.2
		V_OUT = 1.2 V, 0 ≤ I_Load ≤ 1 A, T_J = 25°C⁽²⁾			0.5	1.3
		V_OUT = 1.2 V, 0 ≤ I_Load ≤ 1 A, T_J = 125°C⁽²⁾			0.6	1.3
		V_OUT = 1.2 V, 0 ≤ I_Load ≤ 2 A, T_J = –55°C⁽²⁾			0.8	1.6
		V_OUT = 1.2 V, 0 ≤ I_Load ≤ 2 A, T_J = 25°C⁽²⁾			1.1	2.1
		V_OUT = 1.2 V, 0 ≤ I_Load ≤ 2 A, T_J = 125°C⁽²⁾			1.5	2.1
		V_OUT = 1.2 V, 0 ≤ I_Load ≤ 3 A, T_J = –55°C⁽²⁾			1	1.7
		V_OUT = 1.2 V, 0 ≤ I_Load ≤ 3 A, T_J = 25°C⁽²⁾			1.1	2.4
		V_OUT = 1.2 V, 0 ≤ I_Load ≤ 3 A, T_J = 125°C⁽²⁾			2.2	3.5
		V_OUT = 1.8 V, 0 ≤ I_Load ≤ 1 A, T_J = –55°C⁽²⁾			0.1	0.9
		V_OUT = 1.8 V, 0 ≤ I_Load ≤ 1 A, T_J = 25°C⁽²⁾			0.3	0.9
		V_OUT = 1.8 V, 0 ≤ I_Load ≤ 1 A, T_J = 125°C⁽²⁾			0.4	1.2
		V_OUT = 1.8 V, 0 ≤ I_Load ≤ 2 A, T_J = –55°C⁽²⁾			1.4	2.4
		V_OUT = 1.8 V, 0 ≤ I_Load ≤ 2 A, T_J = 25°C⁽²⁾			0.7	1.4
		V_OUT = 1.8 V, 0 ≤ I_Load ≤ 2 A, T_J = 125°C⁽²⁾			0.6	1.9
		V_OUT = 1.8 V, 0 ≤ I_Load ≤ 3 A, T_J = –55°C⁽²⁾			2.5	3.9
		V_OUT = 1.8 V, 0 ≤ I_Load ≤ 3 A, T_J = 25°C⁽²⁾			1.2	2.1
		V_OUT = 1.8 V, 0 ≤ I_Load ≤ 3 A, T_J = 125°C⁽²⁾			1.2	2.5
		V_OUT = 6.65 V, 0 ≤ I_Load ≤ 1 A, T_J = –55°C⁽²⁾			1.5	2.9
		V_OUT = 6.65 V, 0 ≤ I_Load ≤ 1 A, T_J = 25°C⁽²⁾			0.4	2.6
		V_OUT = 6.65 V, 0 ≤ I_Load ≤ 1 A, T_J = 125°C⁽²⁾			2.8	3.5
		V_OUT = 6.65 V, 0 ≤ I_Load ≤ 2 A, T_J = –55°C⁽²⁾			3.5	5.9
		V_OUT = 6.65 V, 0 ≤ I_Load ≤ 2 A, T_J = 25°C⁽²⁾			1.1	4.7
		V_OUT = 6.65 V, 0 ≤ I_Load ≤ 2 A, T_J = 125°C⁽²⁾			5.8	8
		V_OUT = 6.65 V, 0 ≤ I_Load ≤ 3 A, T_J = –55°C⁽²⁾			5.6	9.3
		V_OUT = 6.65 V, 0 ≤ I_Load ≤ 3 A, T_J = 25°C⁽²⁾			3.7	8
		V_OUT = 6.65 V, 0 ≤ I_Load ≤ 3 A, T_J = 125°C⁽²⁾			13	25
V_DO	Dropout voltage⁽³⁾	I_OUT = 3 A, V_OUT = 1.3 V, V_IN = V_OUT + V_DO			210	335	mV
I_CL	Programmable output current limit range	V_IN = 1.5 V, V_OUT = 1.2 V, PCL resistance = 47 kΩ		500		750	mA
I_CL	Programmable output current limit range	V_IN = 1.5 V, V_OUT = 1.2 V, PCL resistance varies		200		3500⁽⁴⁾	mA
V_CS	Operating voltage range at CS (see Section 7)⁽⁵⁾			0		V_IN	V
CSR	Current sense ratio	I_LOAD / I_CS, V_IN = 2.3 V, V_OUT = 1.9 V, T_J = –55°C, I_LOAD ≥ 500 mA		45000	55500	65000	A/A
		_LOAD / I_CS, V_IN = 2.3 V, V_OUT = 1.9 V, T_J = 25°C, I_LOAD ≥ 500 mA		45000	52000	59000
		_LOAD / I_CS, V_IN = 2.3 V, V_OUT = 1.9 V, T_J = 125°C, I_LOAD≥ 500 mA		45000	51000	56000
I_GND	GND terminal current	V_IN = 1.5 V, V_OUT = 1.2 V, I_OUT = 2 A			10	16	mA
I_Q	Quiescent current (no load)	V_IN = V_OUT + 0.5 V, I_OUT = 0 A			7	10	mA
I_SHDN	Shutdown current	1.5 V ≤ V_IN ≤ 7 V, pre and post 100 krad(Si), T_J = 25°C⁽⁶⁾			26	230	µA
I_SNS, I_FB	FB/SNS terminal current	V_IN = 7 V, V_OUT = 6.65 V			1	5	nA
I_EN	EN terminal input current	V_IN = 7 V, V_EN = 7 V, V_OUT = 6.65 V			20	150	nA
V_ILEN	EN terminal input low (disable)	1.5 V < V_IN < 7 V				0.55	V
V_IHEN	EN terminal input high (enable)	1.5 V < V_IN < 7 V		V_IN – 0.7			V
Eprop Dly	Enable terminal propagation delay	V_IN = 2.2 V, EN rise to I_OUTrise			650	1000	µs
T_EN	Enable terminal turn-on delay (delay to PG assertion)	V_IN = 2.2 V, V_OUT = 1.8 V, I_LOAD = 1 A, C_OUT = 220 µF, C_SS = 2 nF			1.4	1.6	ms
V_THPG	PG threshold	No load, 0.8 V ≤ V_OUT ≤ 6.65 V		86%	90%
V_THPGHYS	PG hysteresis	1.5 V ≤ V_IN ≤ 7 V			2%
V_OL_PG	PG terminal output low	I_PG = 0 mA to –1 mA			120	300	mV
I_LKGPG	PG terminal leakage current	V_OUT > V_THPG, V_PG = 1.2 V			0.2	1.5	µA
I_LKGPG	PG terminal leakage current	V_OUT > V_THPG, V_PG = 7 V			0.5	2.5	µA
I_SS	SS terminal charge current	V_IN = 1.5 V to 7 V			2.5	3.5	µA
I_SSdisb	SS terminal disable current	V_IN = 1.5 V to 7 V			5	10	µA
V_SS	SS terminal voltage (device enabled)⁽⁷⁾	V_IN = 1.5 V to 7 V				1.232	V
V_SSdisb	SS terminal low-level input voltage to disable device	V_IN = 1.5 V to 7 V				0.4	V
PSRR	Power-supply rejection ratio	V_IN = 2.5 V, V_OUT = 1.8 V, C_OUT = 220 µF	1 kHz		48		dB
PSRR	Power-supply rejection ratio	V_IN = 2.5 V, V_OUT = 1.8 V, C_OUT = 220 µF	100 kHz		25		dB
V_N	Output noise voltage	BW = 10 Hz to 100 kHz, I_OUT = 3 A, V_IN = 2 V, V_OUT = 1.8 V			20.33		µV_RMS
TSD	Thermal shutdown temperature				185		°C

(1) The output voltage accuracy of condition at I_OUT = 2 A and I_OUT = 3 A is specified by characterization, but not production tested.

(2) Line and load regulations done under pulse condition for t < 10 ms.

(3) The parameter is specified to the limit in characterization, but not production tested.

(4) The maximum limit of the I_CLparameter is specified to the limit in characterization, but not production tested.

(5) To insure foldback is enabled, V_CS must be > 0.9 · V_FB.

(6) This maximum limit applies to SMD 5962R13202 post 100-krad(Si) test at 25°C.

(7) Any external pullup voltage should not exceed 1.188 V.