SLVSDW6C April   2017  – April 2021 TPS7H1101A-SP

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Soft Start
      2. 7.3.2 Power Good (PG)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable/Disable
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Stability
    2. 8.2 Typical Application
      1. 8.2.1 Detailed Design Procedure
        1. 8.2.1.1 Adjustable Output Voltage (Feedback Circuit)
        2. 8.2.1.2 PCL
        3. 8.2.1.3 High-Side Current Sense
        4. 8.2.1.4 Current Foldback
        5. 8.2.1.5 Transient Response
        6. 8.2.1.6 Current Sharing
        7. 8.2.1.7 Compensation
        8. 8.2.1.8 Output Noise
        9. 8.2.1.9 Capacitors
      2. 8.2.2 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.1.2 PCL

PCL resistor, RPCL, sets the overcurrent limit activation point and can be calculated per Equation 3.

Equation 3. RPCL = (CSR × VREF) / (ICL – 0.0403)

where

  • VREF = 0.605 V
  • ICL = Programmable current limit (A)
  • Current sense ratio (CSR) is the ratio of output load current to ICS; typical value of the CSR is 52000
  • Offset value 0.0403 is a fixed offset derived from internal keep-alive biasing

Figure 8-3 shows the output load current (ILOAD) versus PCL terminal current (IPCL) varied with minimum and maximum range of CSR values by temperature. The RPCL resistor should be chosen to set the worst case ILOAD across system normal operating load and temperature range without reaching overcurrent activation point of IPCL · RPCL ≥ VREF.

Additionally, a suitable resistor RCS must be chosen to ensure the CS terminal is within its operating range of 0.3 V to VIN and VCS needs to be greater than 0.9 · VREF (0.544 V) to insure foldback remains enabled when current activation point is triggered.

The maximum PCL is 3.5 A. The range of resistor that can be used on the PCL terminal to GND is 8.2 kΩ to 160 kΩ. It is not recommended to use overcurrent limit activation thresholds of less than 500 mA due to internal bias offset currents representing a larger percentage of total IPCLcurrent and therefore additional error.

GUID-76D63CC2-FE20-4374-B86B-2107999260DA-low.gifFigure 8-3 ILOAD (A) vs IPCL (A)