SLUSD66D September 2019 – February 2021 TPS92520-Q1
PRODUCTION DATA
The LHCFG1 register contains bits associated with the enabling of channels and several device-related functions when operating in limp-home mode. Figure 7-52 shows the LHCFG1 register. Table 7-41 describes the LHCFG1 register.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
LHPWMPH | LHEXTIADJ | LH2100D | LH2INTPWM | LH2EN | LH1100D | LH1INTPWM | LH1EN |
R/W-0b | R/W-0b | R/W-0b | R/W-0b | R/W-0b | R/W-0b | R/W-0b | R/W-0b |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7 | LHPWMPH | R/W | 0 | PWM phase shift setting for internal PWM generator in limp-home mode. 0 = 180° phase shift between internally-generated PWM signals 1 = 0° phase shift between internally generated PWM signals |
6 | LHEXTIADJ | R/W | 0 | This bit is used to select between internal or external current reference set point. The external reference is set by voltage on LHI pin and is converted to a 10-bit value by internal ADC. 0 = Use internal LHxIADJ register as the CHxIADJ setting in limp-home mode. 1 = Use external LHI reference as the CHxIADJ setting in limp-home mode. |
5 | LH2100D | R/W | 0 | Set channel 2 PWM duty cycle to 100% in limp-home mode. 0 = LED current duty cycle based on internal or external command 1 = LED current duty cycle set to 100% |
4 | LH2INTPWM | R/W | 0 | This bit is used to enable internal PWM generator function for channel 2 in limp-home mode. 0 = LED current duty cycle of channel 2 controlled by an external signal connected to UDIM2 input 1 = LED current duty cycle of channel 2 controlled by an internal PWM generator (registers PWMDIV and LH2PWM). UDIM2 input must be above VUDIM2(UVLO) threshold. |
3 | LH2EN | R/W | 0 | CH2 enable. This bit controls the operation of channel 2 in limp-home mode. 0 = Disable LED channel 2. 1 = Enable LED channel 2. |
2 | LH1100D | R/W | 0 | Set channel 1 PWM duty cycle to 100% in limp-home mode. 0 = LED current duty cycle based on internal or external command 1 = LED current duty cycle set to 100% |
1 | LH1INTPWM | R/W | 0 | This bit is used to enable internal PWM generator function for channel 1 in limp-home mode. 0 = LED current duty cycle of channel 1controlled by external signal connected to UDIM1 input 1 = LED current duty cycle of channel 1 controlled by internal PWM generator (registers PWMDIV and LH1PWM). UDIM1 input must be above VUDIM1(UVLO) threshold. |
0 | LH1EN | R/W | 0 | CH1 enable. This bit controls the operation of channel 1 in limp-home mode. 0 = Disable LED channel 1. 1 = Enable LED channel 1. |