SLVSE03B April 2019 – February 2021 TPS929120-Q1
PRODUCTION DATA
STEP1: Determine the architecture at system level.
Because MCU is located in a speared board to the LED boards, the CAN physical layer must be utilized for off-board long distance communication between LED driver boards and MCU board. The overall system block diagram is shown in Figure 8-2 and the typical schematic for 24 strings of LED board is shown in Figure 8-2. The pullup resistors for RX and TX interface may or may not be required, depending the model of the CAN transceiver. Normally the pullup resistor value for RX and TX must be about 10 kΩ. TI recommends putting a 4.7-µF ceramic capacitor on the VLDO output to keep the voltage stable. Because only one CAN transceiver is required per one PCB board, the CAN transceiver must only be powered by one LDO output of the TPS929120-Q1. DO NOT tie the LDO outputs for all TPS929120-Q1 in one PCB board. TI also recommends placing a 4.7-µF decoupling ceramic capacitor close to the SUPPLY pin of each TPS929120-Q1 to obtain good EMC performance.
STEP2: Thermal analysis for the worst application conditions.
Normally the thermal analysis is necessary for linear LED-driver applications to ensure that the operation junction temperature of TPS929120-Q1 is well managed. The total power consumption on the TPS929120-Q1 itself is one important factor determining operation junction temperature, and it can be calculated by using Equation 8.
where
Based on the worst-case analysis for maximum power consumption on device, either optimizing PCB layout for better power dissipation as Layout Example describing or implementing a DC-to-DC converter in previous stage on MCU board can be considered. The DC-to-DC such as a buck converter or buck-boost converter can regulate the batter voltage to be a stable supply for the TPS929120-Q1 with sufficient headroom. It minimizes the power combustion on the TPS929120-Q1 itself as well as the whole system. In this application, the DC-to-DC converter with 8.5-V output voltage can make sure current output on each output channel of TPS929120-Q1 is stable. The calculated maximum power dissipation on the device is 1.68 W as Equation 9.
where
STEP3: Set up the slave address for individual TPS929120-Q1.
The slave address of TPS929120-Q1 can be configured by ADDR2/ADDR1/ADDR0 pins or EEP_DEVADDR selected by EEP_INTADDR. The detail description is explained in UART Interface Address Setting. If the total number of TPS929120-Q1 is less than 8, TI recommends using ADDR2/ADDR1/ADDR0 pins for slave device configuration.
STEP4: DC current setup for each LED string.
The DC current for all output channel can be programable by external resistor, R(REF) and internal register CONF_REFRANGE. The resistor value can be calculated by using Figure 8-2. The manufacturer default value for K(REF) is 512. If the other number rather than 512 is chosen for DC current setting, the selected code needs to burnt into EEPROM register EEP_REFRANGE to change the default value for CONF_REFRANGE. A 1-nF ceramic capacitor could be placed in parallel with R(REF) resistor to improve the noise immunity. The CONF_IOUTx register can be used to program DC current for each output channel independently mainly for dot correction purpose. The code setting for CONF_IOUTx must be decided in the end of production line according to the LED calibration result. The detail calculation is described in 64-Step Programmable High-Side Constat-Current Output.
where
CURRENT (mA) | CONF_REFRANGE | K(REF) | REF RESISTOR VALUE (kΩ) |
---|---|---|---|
50 | 11b | 512 | 12.7 |
10b | 256 | 6.34 | |
01b | 128 | 3.16 | |
00b | 64 | 1.58 |
TI recommends placing a 1-nF ceramic capacitor on each of output channels to achieve good EMC performance.
STEP5: Design the configuration for PWM generator. Basically there are three main parameters for PWM generator must be considered including:
STEP6: Design the diagnostics configuration. The diagnostics configuration for both normal state and fail-safe states must be set up properly based on the system requirements. The following configuration registers need to designed:
STEP7: EEPROM burning solution design.
TI recommends that the EEPROM burning be done in the end of production line; the detail flow is introduced in EEPROM Register Access and Burn .