SLUSDV8B November   2020  – March 2021 TPSM5D1806

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics (VIN = 12 V)
    7. 6.7 Typical Characteristics (VIN = 5 V)
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Adjustable Output Voltage
      2. 7.3.2  Frequency Selection
        1. 7.3.2.1 Synchronization
        2. 7.3.2.2 Allowable Switching Frequency
      3. 7.3.3  Minimum and Maximum Input Voltage
      4. 7.3.4  Recommended Settings
      5. 7.3.5  Device Mode Configuration
        1. 7.3.5.1 MODE1 (Operating Mode and Phase Position)
        2. 7.3.5.2 MODE2 (Setting the Switching Frequency)
      6. 7.3.6  Input Capacitors
      7. 7.3.7  Minimum Required Output Capacitance
      8. 7.3.8  Ambient Temperature Versus Total Power Dissipation
      9. 7.3.9  Remote Sense
      10. 7.3.10 Enable (EN) and Under Voltage Lockout (UVLO)
      11. 7.3.11 Soft Start
      12. 7.3.12 Power Good
      13. 7.3.13 Safe Start-up into Pre-Biased Outputs
      14. 7.3.14 BP5
      15. 7.3.15 Overcurrent Protection
      16. 7.3.16 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Active Mode
      2. 7.4.2 Shutdown Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application (Dual Outputs)
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Output Voltage Setpoint
        3. 8.2.2.3 Input Capacitors
        4. 8.2.2.4 Output Capacitor Selection
      3. 8.2.3 Typical Application (Paralleled Outputs)
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
          1. 8.2.3.2.1 Output Voltage Setpoint
          2. 8.2.3.2.2 Input Capacitors
          3. 8.2.3.2.3 Output Capacitor Selection
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
      1. 10.2.1 Package Specifications
      2. 10.2.2 EMI
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Custom Design With WEBENCH® Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The TPSM5D1806 dual 6-A output power module is a highly integrated and flexible DC-DC power supply packaged in a compact 8-mm × 5.5-mm × 1.8-mm, QFN package. The input voltage range of 4.5 V to 15 V allows conversion from a wide intermediate bus as well as standard 5-V and 12-V rails. The two 6-A outputs can be configured independently for two separate power rails or combined for a single 2-phase, 12-A output.

The low-profile, 51-pin QFN package with optimal package layout enhances thermal performance. The package footprint has all signal pins accessible from the perimeter and large thermal pads beneath the device for simple layout and easy handling in manufacturing.

The integrated power design eliminates the loop compensation and magnetics part selection from the design process. The device offers independent enable control and power good signal for each output. Switching frequency and phase offsetting can be configured using pin-strapping. The device also offers overcurrent and thermal shutdown protection.

Device Information
DEVICE NUMBERPACKAGE(1)BODY SIZE (NOM)
TPSM5D1806QFN8 mm × 5.5 mm × 1.8 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
GUID-0D5098DC-8C9E-48F1-B9AE-CF715F99C8F7-low.gifDual Output Simplified Schematic
GUID-20201109-CA0I-FM15-FCC4-NHBXV5G8XNCD-low.gifOutput Configurations