JAJSF36L November   2008  – February 2019 ADC14155QML-SP

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
    1.     ブロック図
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Descriptions and Equivalent Circuits
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  ADC14155 Converter Electrical Characteristics DC Parameters
    6. 6.6  ADC14155 Converter Electrical Characteristics (Continued) DYNAMIC Parameters
    7. 6.7  ADC14155 Converter Electrical Characteristics (Continued) Logic and Power Supply Electrical Characteristics
    8. 6.8  ADC14155 Converter Electrical Characteristics (Continued) Timing and AC Characteristics
    9. 6.9  Timing Diagram
    10. 6.10 Transfer Characteristic
    11. 6.11 Typical Performance Characteristics, DNL, INL
    12. 6.12 Typical Performance Characteristics, Dynamic Performance
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Inputs
        1. 7.3.1.1 Differential Analog Input Pins
        2. 7.3.1.2 Driving The Analog Inputs
        3. 7.3.1.3 Input Common Mode Voltage
      2. 7.3.2 Reference Pins
      3. 7.3.3 Digital Inputs
        1. 7.3.3.1 Clock Inputs
        2. 7.3.3.2 Power-Down (PD)
        3. 7.3.3.3 Clock Mode Select/Data Format (CLK_SEL/DF)
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Radiation Environments
      1. 8.3.1 Total Ionizing Dose (TID)
      2. 8.3.2 Single Event Effects
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デバイスの項目表記
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • NBA|48
サーマルパッド・メカニカル・データ
発注情報

6.6 ADC14155 Converter Electrical Characteristics (Continued) DYNAMIC Parameters(11)

Unless otherwise specified, the following specifications apply: AGND = DGND = DRGND = 0 V, VA = VD = 3.3 V, VDR = 1.8 V, Internal VREF = 1 V, fCLK = 155 MHz, VCM = VRM, CL = 5 pF/pin, Differential Analog Input, Single-Ended Clock Mode, Offset Binary Format. Typical values are for TA = 25°C. (1)(4)(5)(2)
PARAMETER TEST CONDITIONS NOTES TYP(6) MIN MAX UNITS SUB-GROUPS
DYNAMIC CONVERTER CHARACTERISTICS, AIN = -1 dBFS
FPBW Full power bandwidth -1 dBFS Input, -3 dB Corner 1.1 GHz
SNR Signal-to-noise ratio fIN = 10 MHz 69 dBFS
fIN = 70 MHz 70.1 66.7 dBFS
fIN = 169 MHz 68.5 dBFS
fIN = 238 MHz 68.5 dBFS
fIN = 398 MHz 66.4 dBFS
SFDR Spurious free dynamic range fIN = 10 MHz 82 dBFS
fIN = 70 MHz 82.3 68.2 dBFS
fIN = 169 MHz 80.5 dBFS
fIN = 238 MHz 77.3 dBFS
fIN = 398 MHz 63.5 dBFS
ENOB Effective number of bits fIN = 10 MHz 11.3 Bits
fIN = 70 MHz 11.3 10.7 Bits
fIN = 169 MHz 11.0 Bits
fIN = 238 MHz 11.0 Bits
fIN = 398 MHz 10.0 Bits
THD Total harmonic disortion fIN = 10 MHz –81 dBFS
fIN = 70 MHz –79.9 –67 dBFS
fIN = 169 MHz –82.4 dBFS
fIN = 238 MHz –76.6 dBFS
fIN = 398 MHz –63.2 dBFS
HD2 Second-order harmonic distortion fIN = 10 MHz –95.4 dBFS
fIN = 70 MHz –88.5 –70 dBFS
fIN = 169 MHz –88.3 dBFS
fIN = 238 MHz –77.3 dBFS
fIN = 398 MHz –60.9 dBFS
HD3 Third-order harmonic distortion fIN = 10 MHz –81.6 dBFS
fIN = 70 MHz –82.3 –68 dBFS
fIN = 169 MHz –86.4 dBFS
fIN = 238 MHz –89.0 dBFS
fIN = 398 MHz –80.5 dBFS
SINAD Signal-to-noise and distortion ratio fIN = 10 MHz 68.2 dBFS
fIN = 70 MHz 69.9 66.2 dBFS
fIN = 169 MHz 68.3 dBFS
fIN = 238 MHz 67.8 dBFS
fIN = 398 MHz 61.5 dBFS
(1) The inputs are protected as shown below. Input voltage magnitudes above VA or below GND will not damage this device, provided current is limited per Note 5. However, errors in the A/D conversion can occur if the input goes above 2.6V or below GND as described in the Recommended Operating Conditions section.

ADC14155QML-SP 20210711.gif
(2) When the input voltage at any pin exceeds the power supplies (that is, VIN < AGND, or VIN > VA), the current at that pin should be limited to ±5 mA. The ±50 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of ±5 mA to 10.