JAJSOX0A March 2024 – June 2024 ADS127L18
ADVANCE INFORMATION
An optional CRC detects unintended changes to the register settings. The CRC value is two bytes located in registers 05h (high byte) and 06h (low byte). Calculate the CRC value over the register space and write the value to the CRC registers. The ADC compares the CRC register value against an internal calculation. The REG_ERR flag of the STATUS byte is set if the CRC register value is incorrect. Correct the CRC value, then write 1 to the REG_ERR bit to clear the error. The REG_CRC_EN bit of the GEN_CFG3 register enables the CRC.
The CRC value is calculated over register addresses 08h to 50h for both the ADS127L14 and the ADS127L18 devices. Use a 16-bit polynomial for the register map CRC based on the CRC-16-IBM polynomial: X16 + X15 + X2 + 1. The 17 coefficients are 1 10000000 00000101.