JAJSOX0B March 2024 – November 2024 ADS127L18
PRODMIX
Register access by the read and write commands is checked for valid address range. The valid address range is 00h to 50h for both ADS127L14 and ADS127L18 devices. The ADDR_ERR bit is set in the STATUS register when the register address range is exceeded. Clear the error by writing 1b. Except for the STATUS register, register write operations are blocked if the flag is set. Address range checking is enabled by setting SPI_ADDR_EN = 1b in the GEN_CFG3 register.