JAJSOX0A March 2024 – June 2024 ADS127L18
ADVANCE INFORMATION
STATUS_DP is an optional header byte prefixed to the conversion data for each channel. STATUS_DP indicates the ADC channel number and the channel status. Figure 8-49 and Table 8-23 describe the field descriptions. The STATUS_DP header is enabled by setting the DP_STAT_EN bit of the DP_CFG1 register.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
PWR_FLAG | ERR_FLAG | MOD_FLAG | RPT_DATA | FLT_RDY | CH_ID[2:0] |
Bit | Field | Description |
---|---|---|
7 | PWR_FLAG | Power flag. This flag is an OR of the ALV_FLAG and POR_FLAG of the SPI STATUS register, indicating a power-supply power-up or brownout condition. If desired, clear the PWR_FLAG by clearing ALV_FLAG and POR_FLAG. Clearing the PWR_FLAG is not necessary for operation. This bit is always 0 in hardware programming mode. 0b = No power supply event from flag last cleared 1b = Power-supply event |
6 | ERR_FLAG | Error flag. This bit is the inversion of the ERROR pin output. This bit is always 0 in hardware programming mode. See the Error Pin section for details. 0b = No error 1b = Error |
5 | MOD_FLAG | Modulator saturation flag. This bit indicates modulator saturation during the conversion cycle. The flag is updated at the completion of each conversion. 0b = No modulator saturation 1b = Modulator saturation |
4 | RPT_DATA | Repeat data flag. This bit indicates whether data are new or are repeated data. Repeated data are caused by different data rates between channels with slower channels repeating the original data between the data of faster channels. Repeated data are also caused by the repeat-data mode, programmed by the DP_DAISY bit of the DP_CFG1 register. In the repeat-data mode, data are repeated after the original data. In daisy-chain mode, data on DIN are shifted out after the original data. This bit is always 0 in hardware programming mode. 0b = Data are new 1b = Data are repeated |
3 | FLT_RDY | Filter ready flag. After device synchronization, the initial data are either settled or unsettled, as programming by the DP_MODE bit of the DP_CFG1 register. When the channel is in power-down or standby, this bit is always 0. 0b = Data are unsettled 1b = Data are settled |
2:0 | CH_ID[2:0] | Channel identification
number. These bits indicate the device channel number corresponding to the data. 000b = Channel 0 001b = Channel 1 010b = Channel 2 011b = Channel 3 100b = Channel 4 101b = Channel 5 110b = Channel 6 111b = Channel 7 |