JAJS245G August 2007 – January 2024 CDCE949 , CDCEL949
PRODUCTION DATA
The CDCE949 and CDCEL949 devices are modular PLL-based, low-cost, high-performance, programmable clock synthesizers, multipliers, and dividers. They generate up to nine output clocks from a single input frequency. Each output can be programmed in-system for any clock frequency up to 230 MHz, using one of the four integrated configurable PLLs.
The CDCEx949 has separate output supply pins, VDDOUT, which is 1.8 V for CDCEL949 and 2.5 V to 3.3 V for CDCE949.
The input accepts an external crystal or LVCMOS clock signal. If an external crystal is used, an on-chip load capacitor is adequate for most applications. The value of the load capacitor is programmable from 0 to 20 pF. Additionally, a selectable on-chip VCXO allows synchronization of the output frequency to an external control signal, that is, the PWM signal.
The deep M/N divider ratio allows the generation of 0-ppm audio and video, networking (WLAN, Bluetooth, Ethernet, GPS), or Interface (USB, IEEE1394, memory stick) clocks from a reference input frequency such as
27 MHz.
All PLLs support spread-spectrum clocking (SSC). SSC can be center-spread or down-spread clocking. This is a common technique to reduce electro-magnetic interference (EMI).
Based on the PLL frequency and the divider settings, the internal loop filter components are automatically adjusted to achieve high stability, and to optimize the jitter-transfer characteristics of each PLL.
The device supports non-volatile EEPROM programming for easy customization of the device to the application. The internal EEPROM of the CDCEx949 is preset to a factory-default configuration (see Default Device Setting). The EEPROM can be reprogrammed to a different application configuration before PCB assembly, or reprogrammed by in-system programming. All device settings are programmable through the SDA and SCL bus, a 2-wire serial interface.
Three programmable control inputs, S0, S1 and S2, can be used to control various aspects of operation including frequency selection, changing the SSC parameters to lower EMI, PLL bypass, power down, and choosing between low level or 3-state for the output-disable function.
The CDCEx949 operates in a 1.8-V environment within a temperature range of –40°C to 85°C.