JAJSH89D May 2012 – April 2019 CDCUN1208LP
PRODUCTION DATA.
Table 2 shows how to set the output buffer type using the OTTP pin. This setting affects all device outputs equally. Certain combinations of output buffers include a dedicated power supply pin, which must be properly bypassed. If the device output configuration is set to LVCMOS, then the supply voltage applied establishes the switching thresholds corresponding to the supply provided according to Clock Output Buffer Electrical Characteristics (Output Mode = LVCMOS). For example, if OUT1 and OUT2 are supplied with a 1.8-V power supply through the VDDO1 pin, the switching thresholds are set to the 1.8-V logic domain. The system may have other logic supplies (1.8 V, 2.5 V, or 3.3 V) connected to the device on different output buffer supply domains simultaneously. This enables the device to clock devices operating on different supplies, without the need for external logic level translation buffers. The CDCUN1208LP automatically adjusts the switching thresholds corresponding to these common logic power supply voltages. For more information regarding the power supplies for the output section, see Device Power Supply Connections and Sequencing.
OTTP (Pin 19) | OUTPUT TYPE |
---|---|
LOW | LVDS |
HIGH | HCSL |
OPEN | LVCMOS |