JAJSES1D August   2013  – February 2018 DAC3151 , DAC3161 , DAC3171

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     DAC31x1のシステム・ブロック図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions: DAC3151
    2.     Pin Functions: DAC3161
    3.     Pin Functions: DAC3171 7-Bit Interface Mode
    4.     Pin Functions: DAC3171 14-Bit Interface Mode
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: DC Specifications
    6. 6.6 Electrical Characteristics: AC Specifications
    7. 6.7 Electrical Characteristics: Digital Specifications
    8. 6.8 Timing Requirements
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Data Input Formats
      2. 7.3.2 Serial Interface
        1. Table 1. Instruction Byte of the Serial interface
    4. 7.4 Device Functional Modes
      1. 7.4.1 Synchronization Modes
      2. 7.4.2 Alarm Monitoring
    5. 7.5 Programming
      1. 7.5.1 Power-Up Sequence
    6. 7.6 Register Map
      1. 7.6.1  Register Name: config0 – Address: 0x00, Default: 0x4FC
        1. Table 6. Register Name: config0 – Address: 0x00, Default: 0x4FC
      2. 7.6.2  Register Name: config1 – Address: 0x01, Default: 0x600E
        1. Table 7. Register Name: config1 – Address: 0x01, Default: 0x600E
      3. 7.6.3  Register Name: config2 – Address: 0x02, Default: 0x3FFF
        1. Table 8. Register Name: config2 – Address: 0x02, Default: 0x3FFF
      4. 7.6.4  Register Name: config3 – Address: 0x03, Default: 0x0000
        1. Table 9. Register Name: config3 – Address: 0x03, Default: 0x0000
      5. 7.6.5  Register Name: config4 – Address: 0x04, Default: 0x0000
        1. Table 10. Register Name: config4 – Address: 0x04, Default: 0x0000
      6. 7.6.6  Register Name: config5 – Address: 0x05, Default: 0x0000
        1. Table 11. Register Name: config5 – Address: 0x05, Default: 0x0000
      7. 7.6.7  Register Name: config6 – Address: 0x06, Default: 0x0010(DAC3171); 0x0094(DAC3161); 0x0098(DAC3151)
        1. Table 12. Register Name: config6 – Address: 0x06, Default: 0x0010(DAC3171); 0x0094(DAC3161); 0x0098(DAC3151)
      8. 7.6.8  Register Name: config7 – Address: 0x07, Default: 0xFFFF
        1. Table 13. Register Name: config7 – Address: 0x07, Default: 0xFFFF
      9. 7.6.9  Register Name: config8 – Address: 0x08, Default: 0x6000
        1. Table 14. Register Name: config8 – Address: 0x08, Default: 0x6000
      10. 7.6.10 Register Name: config9 – Address: 0x09, Default: 0x8000
        1. Table 15. Register Name: config9 – Address: 0x09, Default: 0x8000
      11. 7.6.11 Register name: config10 – Address: 0x0A, Default: 0xF080
        1. Table 16. Register Name: config10 – Address: 0x0A, Default: 0xF080
      12. 7.6.12 Register Name: config11 – Address: 0x0B, Default: 0x1111
        1. Table 17. Register Name: config11 – Address: 0x0B, Default: 0x1111
      13. 7.6.13 Register Name: config12 – Address: 0x0C, Default: 0x3A7A
        1. Table 18. Register Name: config12 – Address: 0x0C, Default: 0x3A7A
      14. 7.6.14 Register Name: config13 – Address: 0x0D, Default: 0x36B6
        1. Table 19. Register Name: config13 – Address: 0x0D, Default: 0x36B6
      15. 7.6.15 Register Name: config14 – Address: 0x0E, Default: 0x2AEA
        1. Table 20. Register name: config14 – Address: 0x0E, Default: 0x2AEA
      16. 7.6.16 Register name: config15 – Address: 0x0F, Default: 0x0545
        1. Table 21. Register Name: config15 – Address: 0x0F, Default: 0x0545
      17. 7.6.17 Register Name: config16 – Address: 0x10, Default: 0x0585
        1. Table 22. Register Name: config16 – Address: 0x10, Default: 0x0585
      18. 7.6.18 Register Name: config17 – Address: 0x11, Default: 0x0949
        1. Table 23. Register Name: config17 – Address: 0x11, Default: 0x0949
      19. 7.6.19 Register Name: config18 – Address: 0x12, Default: 0x1515
        1. Table 24. Register Name: config18 – Address: 0x12, Default: 0x1515
      20. 7.6.20 Register Name: config19 – Address: 0x13, Default: 0x3ABA
        1. Table 25. Register Name: config19 – Address: 0x13, Default: 0x3ABA
      21. 7.6.21 Register Name: config20– Address: 0x14, Default: 0x0000
        1. Table 26. Register Name: config20– Address: 0x14, Default: 0x0000
      22. 7.6.22 Register Name: config21– Address: 0x15, Default: 0xFFFF
        1. Table 27. Register Name: config21– Address: 0x15, Default: 0xFFFF
      23. 7.6.23 Register Name: config22– Address: 0x16, Default: 0x0000
        1. Table 28. Register Name: config22– Address: 0x16, Default: 0x0000
      24. 7.6.24 Register Name: config23– Address: 0x17, Default: 0x0000
        1. Table 29. Register Name: config23– Address: 0x17, Default: 0x0000
      25. 7.6.25 Register Name: config24– Address: 0x18, Default: 0x0000
        1. Table 30. Register Name: config24– Address: 0x18, Default: 0x0000
      26. 7.6.26 Register Name: config25– Address: 0x19, Default: 0x0000
        1. Table 31. Register Name: config25– Address: 0x19, Default: 0x0000
      27. 7.6.27 Register Name: config127– Address: 0x7F, Default: 0x0045
        1. Table 32. Register Name: config127– Address: 0x7F, Default: 0x0045
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 仕様の定義
    2. 11.2 関連リンク
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.5 Electrical Characteristics: DC Specifications

full temperature range is TMIN = –40°C to TMAX = 85°C, DAC sample rate = 500 MSPS, 50% clock duty cycle, VDDA33 and IOVDD = 3.3 V, VDDA18, CLKVDD18, and DIGVDD18 = 1.8 V, IOUTFS = 20 mA (unless otherwise noted)
PARAMETER TEST CONDITIONS DAC3151 DAC3161 DAC3171 UNIT
MIN TYP(1) MAX MIN TYP(1) MAX MIN TYP(1) MAX
Resolution 10 12 14 Bits
DC ACCURACY
DNL differential nonlinearity 1 LSB = IOUTFS / 210 for DAC3151,
1 LSB = IOUTFS / 212 for DAC3161,
1 LSB = IOUTFS / 214 for DAC3171		 ±0.04 ±0.2 ±1 LSB
INL integral nonlinearity ±0.15 ±0.5 ±2 LSB
ANALOG OUTPUTS
Coarse gain linearity ±0.4 ±0.4 ±0.4 LSB
Offset error Mid code offset 0.01% 0.01% 0.01% FSR
Gain error With external reference ±2% ±2% ±2% FSR
With internal reference ±2% ±2% ±2%
Gain mismatch With internal reference –2% 2% –2% 2% –2% 2% FSR
Minimum full scale output current Nominal full-scale current,
IOUTFS = 16 × IBAIS current		 2 2 2 mA
Maximum full scale output current 20 20 20
Output compliance range IOUTFS = 20 mA –0.5 1 –0.5 1 –0.5 1 V
Output resistance 300 300 300 kΩ
Output capacitance 5 5 5 pF
REFERENCE OUTPUT
VREF Reference output voltage 1.14 1.2 1.26 1.14 1.2 1.26 1.14 1.2 1.26 V
Reference output current 100 100 100 nA
REFERENCE INPUT
VEXTIO input voltage range External reference mode 0.1 1.2 1.25 0.1 1.2 1.25 0.1 1.2 1.25 V
Input resistance 1 1 1 MΩ
Small signal bandwidth 500 500 500 kHz
Input capacitance 100 100 100 pF
TEMPERATURE COEFFICIENTS
Offset drift ±1 ±1 ±1 ppm of FSR/°C
Gain drift With external reference ±15 ±15 ±15 ppm/°C
With internal reference ±30 ±30 ±30
Reference voltage drift ±8 ±8 ±8 ppm/°C
POWER CONSUMPTION
IVDDA33 3.3 V analog supply current MODE 1
fDAC = 491.52 MSPS, QMC on,
IF = 20 MHz, input full word width		 28 28 28 35 mA
ICLKVDD18 1.8 V clock and analog supply current (CLKVDD18 and VDDA18) 47 47 47 56 mA
IDIGVDD18 1.8 V digital supply current
(DIGVDD18 and VFUSE)		 110 110 110 125 mA
IIOVDD 1.8 V IO supply current 0.002 0.002 0.002 0.015 mA
Pdis Total power dissipation 375 375 375 442 mW
IVDDA33 3.3 V analog supply current MODE 2
fDAC = 320 MSPS, QMC on,
IF = 20 MHz, input full word width		 28 28 28 mA
ICLKVDD18 1.8 V clock and analog supply current (CLKVDD18 and VDDA18) 37 37 37 mA
IDIGVDD18 1.8 V digital supply current
(DIGVDD18 and VFUSE)		 80 80 80 mA
IIOVDD 1.8 V IO supply current 0.002 0.002 0.002 mA
Pdis Total power dissipation 303 303 303 mW
IVDDA33 3.3 V analog supply current MODE 3
Sleep mode, fDAC = 491.52 MSPS,
DAC in sleep mode, input full word width		 2.6 2.6 2.6 mA
ICLKVDD18 1.8 V clock and analog supply current (CLKVDD18 and VDDA18) 43 43 43 mA
IDIGVDD18 1.8 V digital supply current
(DIGVDD18 and VFUSE)		 106 106 106 mA
IIOVDD 1.8 V IO supply current 0.003 0.003 0.003 mA
Pdis Total power dissipation 277 277 277 mW
IVDDA33 3.3 V analog supply current MODE 4
Power-down mode, no clock,
DAC in sleep mode, input full word width		 1.6 4 1.6 4 1.6 4 mA
ICLKVDD18 1.8 V clock and analog supply current (CLKVDD18 and VDDA18) 1.8 4 1.8 4 1.8 4 mA
IDIGVDD18 1.8 V digital supply current
(DIGVDD18 and VFUSE)		 0.7 3 0.7 3 0.7 3 mA
IIOVDD 1.8 V IO supply current 0.003 0.015 0.003 0.015 0.003 0.015 mA
Pdis Total power dissipation 10 26 10 26 10 26 mW
PSRR Power supply rejection ratio DC tested –0.4% 0.4% –0.4% 0.4% –0.4% 0.4% FSR/V
(1) Typical values at TA = 25°C.