JAJSES1D August 2013 – February 2018 DAC3151 , DAC3161 , DAC3171
PRODUCTION DATA.
PARAMETER | TEST
CONDITIONS |
DAC3151 | DAC3161 | DAC3171 | UNIT | |||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MIN | TYP(1) | MAX | MIN | TYP(1) | MAX | MIN | TYP(1) | MAX | ||||||
CMOS DIGITAL INPUTS (RESETB, SDENB, SCLK, SDIO, TXENABLE) | ||||||||||||||
VIH | High-level input voltage | IOVDD = 3.3 V, 2.5 V,
or 1.8 V |
0.6 × IOVDD | 0.6 × IOVDD | 0.6 × IOVDD | V | ||||||||
VIL | Low-level input voltage | IOVDD = 3.3 V, 2.5 V,
or 1.8 V |
0.25 × IOVDD | 0.25 × IOVDD | 0.25 × IOVDD | V | ||||||||
IIH | High-level input current | IOVDD = 3.3 V, 2.5 V,
or 1.8 V |
-40 | 40 | –40 | 40 | μA | |||||||
IIL | Low-level input current | IOVDD = 3.3 V, 2.5 V,
or 1.8 V |
-40 | 40 | –40 | 40 | μA | |||||||
CMOS DIGITAL OUTPUTS (SDOUT, SDIO) | ||||||||||||||
VOH | High-level output voltage | IOVDD = 3.3 V, 2.5 V,
or 1.8 V |
0.85 × IOVDD | 0.85 × IOVDD | 0.85 × IOVDD | V | ||||||||
VOL | Low-level output voltage | IOVDD = 3.3 V, 2.5 V,
or 1.8 V |
0.125 × IOVDD | 0.125 × IOVDD | 0.125 × IOVDD | V | ||||||||
LVPECL DIGITAL INPUTS (DACCLKP, DACCLKN, ALIGNP, ALIGNN) | ||||||||||||||
Vcom | Input common mode voltage | 0.5 | 0.5 | 0.5 | V | |||||||||
VIDIFF | Differential input peak-to-peak voltage | 0.4 | 1.0 | 0.4 | 1.0 | 0.4 | 1.0 | V | ||||||
LVDS INTERFACE (D[x:0]P, D[x:0]N, DA[x:0]P, DA[x:0]N, DA_CLKP, DA_CLKN, DATACLKP, DATACLKN, SYNCP, SYNCN) | ||||||||||||||
VA,B+ | Logic high differential input voltage threshold | 175 | 175 | 175 | mV | |||||||||
VA,B– | Logic low differential input voltage threshold | –175 | –175 | –175 | mV | |||||||||
VCOM | Input Common Mode Range | 1.0 | 1.2 | 2.0 | 1.0 | 1.2 | 2.0 | 1.0 | 1.2 | 2.0 | V | |||
ZT | Internal termination | 85 | 110 | 135 | 85 | 110 | 135 | 85 | 110 | 135 | Ω | |||
CL | LVDS input capacitance | 2 | 2 | 2 | pF |