JAJSES1D August 2013 – February 2018 DAC3151 , DAC3161 , DAC3171
PRODUCTION DATA.
The DAC31x1 includes flexible alarm monitoring that can be used to alert a possible malfunction scenario. All alarm events can be accessed either through the SIP registers or through the ALARM pin. After an alarm is set, the corresponding alarm bit in register config5 must be reset through the serial interface to allow further testing. The set of alarms includes: zero check alarm, FIFO alarms, clock alarms, and pattern checker alarm.
Zero check alarm:
FIFO alarms:
Clock alarms:
Pattern checker alarm:
To prevent unexpected DAC outputs from propagating into the transmit channel chain, the DAC31x1 includes a feature that disables the outputs when a catastrophic alarm occurs. The catastrophic alarms include FIFO pointer collision, the loss DACCLK, or the loss of DATACLK. When any of these alarms occur, the internal TXenable signal is driven low, causing a zeroing of the data going to the DAC in < 10 T. One caveat is if both clocks stop, the circuit cannot determine clock loss, so no alarms are generated; therefore, no zeroing of output data occurs.