at TA =
25°C, VDD = 5.0 V, IOVDD = 1.8 V, external reference, unipolar ranges:
AVSS = 0 V and AVDD ≥ VMAX + 1.5 V for the DAC range,
bipolar ranges: AVSS ≤ VMIN − 1.5 V and AVDD ≥
VMAX + 1.5 V for the DAC range, and DAC output unloaded (unless otherwise
noted)
Figure 5-4 DAC81401 Relative Accuracy vs
Digital Input Code
(Bipolar Outputs)
Figure 5-6 DAC81401 DNL vs Digital Input Code
(Bipolar Outputs)
Figure 5-8 DAC81401 TUE vs Digital Input Code
(Bipolar Outputs)
Figure 5-10 DAC61401 Relative Accuracy vs
Digital Input Code
(Bipolar Outputs)
Figure 5-12 DAC61401 DNL vs Digital Input Code
(Bipolar Outputs)
Figure 5-14 DAC61401 TUE vs Digital Input Code
(Bipolar Outputs)
Figure 5-16 DAC81401 Relative Accuracy vs
Temperature
Figure 5-18 DAC61401 Relative Accuracy vs
Temperature
Figure 5-20 TUE vs Temperature
Figure 5-22 Unipolar Zero Code Error vs
Temperature
Figure 5-24 Bipolar Zero Error vs
Temperature
Figure 5-26 Full-Scale Error vs
Temperature
Figure 5-28 Supply Current (IAVDD,
IAVSS)
vs Digital Input Code
Figure 5-30 Supply Current vs
Temperature
Figure 5-32 Headroom and Footroom From Supply
vs Output Current
Figure 5-34 Full-Scale Settling Time, Rising
Edge
Figure 5-36 DAC Output Enable Glitch
Figure 5-38 Glitch Impulse, 1-LSB Step,
Falling Edge
Figure 5-40 Power-Down Response![DAC61401 DAC81401 DAC Output Noise GUID-20231018-SS0I-RJRD-CRJQ-70VHCBFQCHFW-low.svg](/ods/images/JAJSSA9/GUID-20231018-SS0I-RJRD-CRJQ-70VHCBFQCHFW-low.svg)
DAC range= 0 V to 5 V |
midscale code |
|
|
Figure 5-42 DAC Output Noise
Figure 5-44 Internal Reference Voltage
vs Supply Voltage
Figure 5-46 Internal Reference Noise Density vs
Frequency
Figure 5-48 Internal Reference Temperature Drift
Histogram
Figure 5-5 DAC81401 Relative Accuracy vs
Digital Input Code
(Unipolar Outputs)
Figure 5-7 DAC81401 DNL vs Digital Input Code
(Unipolar Outputs)
Figure 5-9 DAC81401 TUE vs Digital Input Code
(Unipolar Outputs)
Figure 5-11 DAC61401 Relative Accuracy vs
Digital Input Code
(Unipolar Outputs)
Figure 5-13 DAC61401 DNL vs Digital Input Code
(Unipolar Outputs)
Figure 5-15 DAC61401 TUE vs Digital Input Code
(Unipolar Outputs)
Figure 5-17 DAC81401 DNL vs Temperature
Figure 5-19 DAC61401 DNL vs Temperature
Figure 5-21 Unipolar Offset Error vs
Temperature
Figure 5-23 Bipolar Zero Code Error vs
Temperature
Figure 5-25 Gain Error vs Temperature
Figure 5-27 Supply Current (IVDD)
vs Digital Input Code
Figure 5-29 Supply Current (IIOVDD)
vs Supply Voltage
Figure 5-31 Power-Down Current vs
Temperature
Figure 5-33 Source and Sink Capability
Figure 5-35 Full-Scale Settling Time, Falling
Edge
Figure 5-37 Glitch Impulse, 1-LSB Step,
Rising Edge
Figure 5-39 Power-Up Response![DAC61401 DAC81401 DAC Output Noise Density vs
Frequency GUID-20230925-SS0I-1PBP-MNJQ-26JCNSG2VPK1-low.svg](/ods/images/JAJSSA9/GUID-20230925-SS0I-1PBP-MNJQ-26JCNSG2VPK1-low.svg)
DAC range= 0 V to 5 V |
midscale code |
|
|
Figure 5-41 DAC Output Noise Density vs
Frequency
Figure 5-43 Internal Reference Voltage vs
Temperature
Figure 5-45 Internal Reference Voltage vs
Time
Figure 5-47 Internal Reference Noise![DAC61401 DAC81401 AC Power Supply Rejection Ratio
(PSSR-AC) GUID-20231018-SS0I-3STV-W9ZJ-KWLW2BZFRKLZ-low.svg](/ods/images/JAJSSA9/GUID-20231018-SS0I-3STV-W9ZJ-KWLW2BZFRKLZ-low.svg)
VOUT
= 0 V (DAC code at midscale), output unloaded, |
AVDD
= 10 V, AVSS = –10 V, VDD = 5 V, |
supply noise
VPP = 0.2 V |
Figure 5-49 AC Power Supply Rejection Ratio
(PSSR-AC)