JAJSVE4 September   2024 DDS39RF10 , DDS39RFS10

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics - DC Specifications
    6. 6.6  Electrical Characteristics - AC Specifications
    7. 6.7  Electrical Characteristics - Power Consumption
    8. 6.8  Timing Requirements
    9. 6.9  Switching Characteristics
    10. 6.10 SPI and FRI Timing Diagrams
    11. 6.11 Typical Characteristics: Single Tone Spectra
    12. 6.12 Typical Characteristics: Dual Tone Spectra
    13. 6.13 Typical Characteristics: Power Dissipation and Supply Currents
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 DAC Output Modes
        1. 7.3.1.1 NRZ Mode
        2. 7.3.1.2 RTZ Mode
        3. 7.3.1.3 RF Mode
        4. 7.3.1.4 DES Mode
      2. 7.3.2 DAC Core
        1. 7.3.2.1 DAC Output Structure
        2. 7.3.2.2 Full-Scale Current Adjustment
      3. 7.3.3 DEM and Dither
      4. 7.3.4 Offset Adjustment
      5. 7.3.5 Clocking Subsystem
        1. 7.3.5.1 SYSREF Frequency Requirements
        2. 7.3.5.2 SYSREF Position Detector and Sampling Position Selection (SYSREF Windowing)
      6. 7.3.6 Digital Signal Processing Blocks
        1. 7.3.6.1 Digital Upconverter (DUC)
          1. 7.3.6.1.1 Interpolation Filters
          2. 7.3.6.1.2 Numerically Controlled Oscillator (NCO)
            1. 7.3.6.1.2.1 Phase-Continuous NCO Update Mode
            2. 7.3.6.1.2.2 Phase-coherent NCO Update Mode
            3. 7.3.6.1.2.3 Phase-sync NCO Update Mode
            4. 7.3.6.1.2.4 NCO Synchronization
              1. 7.3.6.1.2.4.1 JESD204C LSB Synchonization
            5. 7.3.6.1.2.5 NCO Mode Programming
          3. 7.3.6.1.3 Mixer Scaling
        2. 7.3.6.2 Channel Bonder
        3. 7.3.6.3 DES Interpolator
      7. 7.3.7 JESD204C Interface
        1. 7.3.7.1  Deviation from JESD204C Standard
        2. 7.3.7.2  Transport Layer
        3. 7.3.7.3  Scrambler and Descrambler
        4. 7.3.7.4  Link Layer
        5. 7.3.7.5  Physical Layer
        6. 7.3.7.6  Serdes PLL Control
        7. 7.3.7.7  Serdes Crossbar
        8. 7.3.7.8  Multi-Device Synchronization and Deterministic Latency
          1. 7.3.7.8.1 Programming RBD
        9. 7.3.7.9  Operation in Subclass 0 Systems
        10. 7.3.7.10 Link Reset
      8. 7.3.8 Alarm Generation
    4. 7.4 Device Functional Modes
      1. 7.4.1 DUC and DDS Modes
      2. 7.4.2 JESD204C Interface Modes
        1. 7.4.2.1 JESD204C Interface Modes
        2. 7.4.2.2 JESD204C Format Diagrams
          1. 7.4.2.2.1 16-bit Formats
      3. 7.4.3 NCO Synchronization Latency
      4. 7.4.4 Data Path Latency
    5. 7.5 Programming
      1. 7.5.1 Using the Standard SPI Interface
        1. 7.5.1.1 SCS
        2. 7.5.1.2 SCLK
        3. 7.5.1.3 SDI
        4. 7.5.1.4 SDO
        5. 7.5.1.5 Serial Interface Protocol
        6. 7.5.1.6 Streaming Mode
      2. 7.5.2 Using the Fast Reconfiguration Interface
      3. 7.5.3 SPI Register Map
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Startup Procedure for DUC/Bypass Mode
      2. 8.1.2 Startup Procedure for DDS Mode
      3. 8.1.3 Understanding Dual Edge Sampling Modes
      4. 8.1.4 Eye Scan Procedure
      5. 8.1.5 Pre/Post Cursor Analysis Procedure
      6. 8.1.6 Sleep and Disable Modes
    2. 8.2 Typical Application
      1. 8.2.1 S-Band Radar Transmitter
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
      4. 8.2.4 Detailed Clocking Subsystem Design Procedure
        1. 8.2.4.1 Example 1: SWAP-C Optimized
        2. 8.2.4.2 Example 2: Improved Phase Noise LMX2820 with External VCO
        3. 8.2.4.3 Example 3: Discrete Analog PLL for Best DAC Performance
        4. 8.2.4.4 10GHz Clock Generation
      5. 8.2.5 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power Up and Down Sequence
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines and Example
  10. Device and Documentation Support
    1. 9.1 ドキュメントの更新通知を受け取る方法
    2. 9.2 サポート・リソース
    3. 9.3 商標
    4. 9.4 静電気放電に関する注意事項
    5. 9.5 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Electrical Characteristics - Power Consumption

Typical values at TA = +25°C, minimum and maximum values over operating free-air temperature range, typical supply voltages, 2 channels, DDS Mode, FCLK = 10.24 GHz, FOUT = 2997 MHz, NRZ mode, IFSSWITCH = 20.5 mA, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IVDDA18 1.8-V combined supply current for VDDA18A and VDDA18B Power Mode 1: Dual DACs, 1 DUC shared to both DACs, DDS Mode, FDAC = 10.24 GSPS, FOUT = 2997 MHz, NRZ mode (dual channel version only) 86 mA
IVDDIO 1.8-V supply current for VDDIO 1
IVDDCSR 1.8-V combined supply current for VDDCLK18, VDDSYS18 and VDDR18 85
IVDDL 1.0-V combined supply current for VDDLB, VDDLA 322
IVDDCLK 1.0-V supply current for VDDCLK10 494
IDVDD 1.0-V supply current for VDDDIG, VDDT, VDDEB and VDDEA 1291
IVEE –1.8-V combined supply current for VEEAM18 and VEEBM18 123
PDIS Total power dissipation 2638 mW
IVDDA18 1.8-V combined supply current for VDDA18A and VDDA18B Power Mode 2: Dual DACs, 1 DUC per DAC, DDS Mode, FDAC = 10.24 GSPS, FOUT1 = 2997 MHz, FOUT2 = 3997MHz, NRZ mode (dual channel version only) 86 mA
IVDDIO 1.8-V supply current for VDDIO 1
IVDDCSR 1.8-V combined supply current for VDDCLK18, VDDSYS18 and VDDR18 85
IVDDL 1.0-V combined supply current for VDDLB, VDDLA 325
IVDDCLK 1.0-V supply current for VDDCLK10 494
IDVDD 1.0-V supply current for VDDDIG, VDDT, VDDEB and VDDEA 1381
IVEE –1.8-V combined supply current for VEEAM18 and VEEBM18 123
PDIS Total power dissipation 2730 mW
IVDDA18 1.8-V combined supply current for VDDA18A and VDDA18B Power Mode 3: Dual DACs, 2 DUCs per DAC, DDS Mode, FDAC = 10.24 GSPS, FOUT1 = 2997 MHz, FOUT2 = 3997 MHz, NRZ mode (dual channel version only) 86 mA
IVDDIO 1.8-V supply current for VDDIO 1
IVDDCSR 1.8-V combined supply current for VDDCLK18, VDDSYS18 and VDDR18 85
IVDDL 1.0-V combined supply current for VDDLB, VDDLA 323
IVDDCLK 1.0-V supply current for VDDCLK10 495
IDVDD 1.0-V supply current for VDDDIG, VDDT, VDDEB and VDDEA 1578
IVEE –1.8-V combined supply current for VEEAM18 and VEEBM18 123
PDIS Total power dissipation 2925 mW
IVDDA18 1.8-V combined supply current for VDDA18A and VDDA18B Power Mode 4: Dual DACs, 2 DUCs per DAC, JMODE 6, 64x interpolation, FDAC =10.24 GSPS, FOUT1 = 2997 MHz, FOUT2 = 3997 MHz, NRZ mode (dual channel version only) 86 mA
IVDDIO 1.8-V supply current for VDDIO 1
IVDDCSR 1.8-V combined supply current for VDDCLK18, VDDSYS18 and VDDR18 101
IVDDL 1.0-V combined supply current for VDDLB, VDDLA 313
IVDDCLK 1.0-V supply current for VDDCLK10 494
IDVDD 1.0-V supply current for VDDDIG, VDDT, VDDEB and VDDEA 2382
IVEE –1.8-V combined supply current for VEEAM18 and VEEBM18 123
PDIS Total power dissipation 3748 mW
IVDDA18 1.8-V combined supply current for VDDA18A and VDDA18B Power Mode 5: Single channel device (DDS39RFS10), 1 DUC, DDS Mode, FDAC = 10.24 GSPS, FOUT = 2997 MHz, DES mode 58 mA
IVDDIO 1.8-V supply current for VDDIO 1
IVDDCSR 1.8-V combined supply current for VDDCLK18, VDDSYS18 and VDDR18 85
IVDDL 1.0-V combined supply current for VDDLB, VDDLA 162
IVDDCLK 1.0-V supply current for VDDCLK10 307
IDVDD 1.0-V supply current for VDDDIG, VDDT, VDDEB and VDDEA 841
IVEE –1.8-V combined supply current for VEEAM18 and VEEBM18 71
PDIS Total power dissipation 1761 mW
IVDDA18 1.8-V combined supply current for VDDA18A and VDDA18B Power Mode 6: Single channel device (DDS39RFS10), 2 DUCs, DDS Mode, FDAC = 10.24 GSPS, FOUT = 2997 MHz, NRZ mode 58 mA
IVDDIO 1.8-V supply current for VDDIO 1
IVDDCSR 1.8-V combined supply current for VDDCLK18, VDDSYS18 and VDDR18 86
IVDDL 1.0-V combined supply current for VDDLB, VDDLA 162
IVDDCLK 1.0-V supply current for VDDCLK10 307
IDVDD 1.0-V supply current for VDDDIG, VDDT, VDDEB and VDDEA 935
IVEE –1.8-V combined supply current for VEEAM18 and VEEBM18 71
PDIS Total power dissipation 1791 mW
IVDDA18 1.8-V combined supply current for VDDA18A and VDDA18B Power Mode 7: Single channel device (DDS39RFS10), 4 DUCS, DDS Mode, FDAC = 10.24 GSPS, FOUT1 = 2997 MHz, FOUT2 = 3997 MHz, NRZ mode 58 mA
IVDDIO 1.8-V supply current for VDDIO 1
IVDDCSR 1.8-V combined supply current for VDDCLK18, VDDSYS18 and VDDR18 86
IVDDL 1.0-V combined supply current for VDDLB, VDDLA 162
IVDDCLK 1.0-V supply current for VDDCLK10 307
IDVDD 1.0-V supply current for VDDDIG, VDDT, VDDEB and VDDEA 1144
IVEE –1.8-V combined supply current for VEEAM18 and VEEBM18 71
PDIS Total power dissipation 2000 mW
IVDDA18 1.8-V combined supply current for VDDA18A and VDDA18B Power Mode 8: Single channel device (DDS39RFS10), 4 DUCs, JMODE 7, 64x Interpolation, FDAC = 20.48 GSPS, FOUT = 7997 MHz, DES mode 58 mA
IVDDIO 1.8-V supply current for VDDIO 1
IVDDCSR 1.8-V combined supply current for VDDCLK18, VDDSYS18 and VDDR18 101
IVDDL 1.0-V combined supply current for VDDLB, VDDLA 158
IVDDCLK 1.0-V supply current for VDDCLK10 307
IDVDD 1.0-V supply current for VDDDIG, VDDT, VDDEB and VDDEA 1755
IVEE –1.8-V combined supply current for VEEAM18 and VEEBM18 70
PDIS Total power dissipation 2637 mW
PDIS Total power dissipation Power Mode 14: Sleep, MODE[1:0] = 0b11. 171 mW