JAJSGV8B September 2019 – December 2019 DRV8904-Q1 , DRV8906-Q1 , DRV8908-Q1 , DRV8910-Q1 , DRV8912-Q1
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
The power dissipation due to the quiescent current taken by the power supply (PVM) and the digital supply (PVDD) depends on the applied voltage (VVM and VVDD) and operating mode currents (IVM and IVDD) and are calculated as shown in Equation 11 and Equation 12 respectively.
Putting various parameters from Table 92 in Equation 11 and Equation 12, the power-supply (PVM) and digital-supply (PSW_FALL) quiescent power losses are calculated as shown in Equation 13 and Equation 14 as,
The total quiescent power loss (PQ) is calculated as the sum of quiescent power loss due to VM and VDD as shown in Equation 15 as,
NOTE
The quiescent power is calculated using the typical operating current (IVM and IVDD) which is dependent on supply-voltage, temperature and device to device variation.