JAJSGV8B September 2019 – December 2019 DRV8904-Q1 , DRV8906-Q1 , DRV8908-Q1 , DRV8910-Q1 , DRV8912-Q1
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
DRV89XX-Q1 devices includes 4/8 PWM generators which can be mapped to any of the OUTX half bridge outputs using the PWM map control registers. The HBx_PWM_MAP bits in the PWM_MAP_CTRL_X registers are used to map any of the 4 channels in DRV8912-Q1/DRV8910-Q1 or 8 channels in DRV8908-Q1/DRV8906-Q1/DRV8904-Q1 to the OUTX outputs as shown in Table 3.
HBX_PWM MAP BITS | PWM CHANNEL |
---|---|
HBX_PWM_MAP = 00b | Channel 1 Selected for OUTX |
HBX_PWM_MAP = 01b | Channel 2 Selected for OUTX |
HBX_PWM_MAP = 10b | Channel 3 Selected for OUTX |
HBX_PWM_MAP = 11b | Channel 4 Selected for OUTX |
NOTE
Any half-bridge is mapped to PWM channel 1 by default.