JAJSG74C February   2012  – September 2018 DS90C187

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーション
      2.      代表的なアプリケーション
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Pin Configuration and Functions
    1.     DS90C187 Pin Descriptions — Serializer
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Recommended Input Characteristics
    7. 7.7 Switching Characteristics
    8. 7.8 AC Timing Diagrams
    9. 7.9 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Device Functional Modes
      1. 8.3.1  Device Configuration
      2. 8.3.2  Single Pixel Input / Single Pixel Output
      3. 8.3.3  Single Pixel Input / Dual Pixel Output
      4. 8.3.4  Dual Pixel Input / Dual Pixel Output
      5. 8.3.5  Pixel Clock Edge Select (RFB)
      6. 8.3.6  Power Management
      7. 8.3.7  Sleep Mode (PDB)
      8. 8.3.8  LVDS Outputs
      9. 8.3.9  18 bit / 24 bit Color Mode (18B)
      10. 8.3.10 LVCMOS Inputs
    4. 8.4 Programming
      1. 8.4.1 LVDS Interface / TFT Color Data Recommended Mapping
        1. 8.4.1.1 Color Mapping Information
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 LVDS Interconnect Guidelines
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power Up Sequence
    2. 10.2 Power Supply Filtering
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.5 Electrical Characteristics

Over recommended operating supply and temperature ranges unless otherwise specified.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
LVCMOS DC SPECIFICATIONS
VIH High Level Input Voltage 0.65VDD VDD V
VIL Low Level Input Voltage GND 0.35VDD V
IIN Input Current VIN = 0V or VDD = 1.71 V to 1.89 V –10 ±1 +10 µA
LVDS DRIVER DC SPECIFICATIONS
VOD Differential Output Voltage RL = 100Ω
Figure 3 		VODSEL = VIH 160
(320)		 300
(600)		 450
(900)		 mV
(mVP-P)
VODSEL = VIL 110
(220)		 180
(360)		 300
(600)		 mV
(mVP-P)
ΔVOD Change in VOD between Complimentary Output States RL = 100Ω
Figure 3 		50 mV
VOS Offset Voltage RL = 100Ω
Figure 3 		0.8 0.9 1.0 V
ΔVOS Change in VOS between Complimentary Output States RL = 100Ω
Figure 3 		50 mV
IOS Output Short Circuit Current VOUT = GND, VODSEL = VDD -45 −35 −25 mA
SUPPLY CURRENT
IDDT1 Serializer Worst Case Supply Current (includes load current) Checkerboard pattern,
RL = 100 Ω,
18B = VIL,
VODSEL = VIH,
VDD = 1.89 V,
Figure 1 		f = 105 MHz,
MODE[1:0] = 00
(SISO)		 60 85 mA
IDDT2 f = 185 MHz,
MODE[1:0] = 01
(SIDO)		 95 140 mA
IDDT3 f = 105 MHz,
MODE[1:0] = 10
(DIDO)		 100 150 mA
IDDTP Serializer Supply Current PRBS-7 MODE[1:0] = 01
(SIDO),
f = 150 MHz,
RL = 100 Ω,
PRBS-7 Pattern
Figure 12 		18B = VIL,
VODSEL = VIL,
VDD = 1.8		 55 mA
18B = VIL,
VODSEL = VIH,
VDD = 1.8		 75 mA
18B = VIH,
VODSEL = VIL,
VDD = 1.8		 49 mA
18B = VIH,
VODSEL = VIH,
VDD = 1.8		 65 mA
IDDTG Serializer Supply Current 16 Grayscale MODE[1:0] = 01
(SIDO),
f = 150 MHz,
RL = 100 Ω,
16 Grayscale Pattern		 18B = VIL,
VODSEL = VIL,
VDD = 1.8		 53 mA
18B = VIL,
VODSEL = VIH,
VDD = 1.8		 71 mA
18B = VIH,
VODSEL = VIL,
VDD = 1.8		 48 mA
18B = VIH,
VODSEL = VIH,
VDD = 1.8		 63 mA
IDDZ Power Down Supply Current PDB = GND 18 200 µA