JAJSB16C May 2010 – May 2016 DS92LV2421 , DS92LV2422
PRODUCTION DATA.
The VDD (VDDn and VDDIO) supply ramp must be faster than 1.5 ms with a monotonic rise. If slower then 1.5 ms, then a capacitor on the PDB pin is needed to ensure PDB arrives after all the VDD have settled to the recommended operating voltage. When PDB pin is pulled to VDDIO, TI recommends using a 10-kΩ pullup and a 22-µF capacitor to GND to delay the PDB input signal.