The LM3429 is a versatile high voltage N-channel MosFET controller for LED drivers. It can be easily configured in buck, boost, buck-boost and SEPIC topologies. This flexibility, along with an input voltage rating of 75V, makes the LM3429 ideal for illuminating LEDs in a very diverse, large family of applications.
Adjustable high-side current sense voltage allows for tight regulation of the LED current with the highest efficiency possible. The LM3429 uses Predictive Off-time (PRO) control, which is a combination of peak current-mode control and a predictive off-timer. This method of control eases the design of loop compensation while providing inherent input voltage feed-forward compensation.
The LM3429 includes a high-voltage startup regulator that operates over a wide input range of 4.5 V to 75 V. The internal PWM controller is designed for adjustable switching frequencies of up to 2 MHz, thus enabling compact solutions. Additional features include analog dimming, PWM dimming, overvoltage protection, undervoltage lock-out, cycle-by-cycle current limit, and thermal shutdown.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
LM3429 | HTSSOP (14) | 5.00 mm × 4.40 mm |
LM3429-Q1 |
Changes from G Revision (April 2013) to H Revision
Changes from F Revision (May 2013) to G Revision
PIN | I/O | DESCRIPTION | APPLICATION INFORMATION | |
---|---|---|---|---|
NO. | NAME | |||
1 | VIN | I | Input Voltage | Bypass with 100 nF capacitor to AGND as close to the device as possible in the circuit board layout. |
2 | COMP | I | Compensation | Connect a capacitor to AGND to set compensation. |
3 | CSH | I | Current Sense High | Connect a resistor to AGND to set signal current. For analog dimming, connect current source or potentiometer to AGND (see Analog Dimming section). |
4 | RCT | I | Resistor Capacitor Timing | Connect a resistor from the switch node and a capacitor to AGND to set the switching frequency. |
5 | AGND | GND | Analog Ground | Connect to PGND through the DAP copper circuit board pad to provide proper ground return for CSH, COMP, and RCT. |
6 | OVP | I | Overvoltage Protection | Connect to a resistor divider from the output (VO) or the input to program output overvoltage lockout (OVLO). Turn-off threshold is 1.24 V and hysteresis for turn-on is provided by 20 µA current source. |
7 | nDIM | I | Not DIM input | Connect a PWM signal for dimming as detailed in the PWM Dimming section and/or a resistor divider from VIN to program input undervoltage lockout (UVLO). Turn-on threshold is 1.24 V and hysteresis for turn-off is provided by 20 µA current source. |
8 | NC | No Connection | Leave open. | |
9 | PGND | GND | Power Ground | Connect to AGND through DAP copper pad to provide ground return for GATE. |
10 | GATE | O | Gate Drive Output | Connect to the gate of the external NFET. |
11 | VCC | I | Internal Regulator Output | Bypass with a 2.2 µF–3.3 µF, ceramic capacitor to PGND. |
12 | IS | I | Main Switch Current Sense | Connect to the drain of the main N-channel MosFET switch for RDS-ON sensing or to a sense resistor installed in the source of the same device. |
13 | HSP | I | LED Current Sense Positive | Connect through a series resistor to LED current sense resistor (positive). |
14 | HSN | I | LED Current Sense Negative | Connect through a series resistor to LED current sense resistor (negative). |
DAP (15) | DAP | GND | Thermal pad on bottom of IC | Connect to AGND and PGND. |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Voltage | VIN, nDIM | –0.3 | 76 | V |
OVP, HSP, HSN | –0.3 | 76 | ||
RCT | –0.3 | 3 | ||
IS | –0.3 | 76 | ||
–2 for 100 ns | ||||
VCC | –0.3 | 8 | ||
COMP, CSH | –0.3 | 6 | ||
GATE | –0.3 | VCC | ||
–2.5 for 100 ns | VCC+2.5 for 100 ns | |||
PGND | –0.3 | 0.3 | ||
–2.5 | 2.5 for 100 ns | |||
Continuous Current | VIN, nDIM | –1 | mA | |
OVP, HSP, HSN | –100 | µA | ||
RCT | –1 | 5 | mA | |
IS | –1 | |||
COMP, CSH | –200 | 200 | µA | |
GATE | –1 | 1 | mA | |
Maximum Junction Temperature | Internally Limited | |||
Maximum Lead Temperature (Reflow and Solder) (3) | 260 | °C | ||
Continuous Power Dissipation | Internally Limited | |||
Storage Temperature, Tstg | –65 | 150 | °C |
VALUE | UNIT | ||||
---|---|---|---|---|---|
LM3429 IN PWP PACKAGE | |||||
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) | ±2000 | V | |
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) | ±1000 | ||||
LM3429-Q1 IN PWP PACKAGE | |||||
V(ESD) | Electrostatic discharge | Human body model (HBM), per AEC Q100-002(3) | ±2000 | V | |
Charged device model (CDM), per AEC Q100-011 | ±1000 |
MIN | MAX | UNIT | |
---|---|---|---|
Operating Junction Temperature Range | –40 | 125 | °C |
Input Voltage VIN | 4.5 | 75 | V |
THERMAL METRIC(1) | LM3429-Q1 | LM3429 | UNIT | |
---|---|---|---|---|
PWP (HTSSOP) | PWP (HTSSOP) | |||
14 PINS | 14 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 47.8 | 47.8 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 26.5 | 26.5 | °C/W |
RθJB | Junction-to-board thermal resistance | 22.3 | 22.3 | °C/W |
ψJT | Junction-to-top characterization parameter | 0.7 | 0.7 | °C/W |
ψJB | Junction-to-board characterization parameter | 22.1 | 22.1 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | 3.3 | 3.3 | °C/W |
PARAMETER | TEST CONDITIONS | MIN(1) | TYP(2) | MAX(1) | UNIT | |
---|---|---|---|---|---|---|
STARTUP REGULATOR (VCC) | ||||||
VCC-REG | VCC Regulation | ICC = 0 mA | 6.3 | 6.9 | 7.35 | V |
ICC-LIM | VCC Current Limit | VCC = 0V | 20 | 27 | mA | |
IQ | Quiescent Current | Static | 1.6 | 3 | ||
VCC-UVLO | VCC UVLO Threshold | VCC Increasing | 4.17 | 4.5 | V | |
VCC Decreasing | 3.7 | 4.08 | ||||
VCC-HYS | VCC UVLO Hysteresis | 0.1 | ||||
OVERVOLTAGE PROTECTION (OVP) | ||||||
VTH-OVP | OVP OVLO Threshold | OVP Increasing | 1.18 | 1.24 | 1.28 | V |
IHYS-OVP | OVP Hysteresis Source Current | OVP Active (high) | 10 | 20 | 30 | µA |
ERROR AMPLIFIER | ||||||
VCSH | CSH Reference Voltage | With Respect to AGND | 1.21 | 1.235 | 1.26 | V |
Error Amplifier Input Bias Current | MIN, MAX: TJ = 25°C | –0.6 | 0 | 0.6 | µA | |
COMP Sink / Source Current | 10 | 26 | 40 | |||
Transconductance | 100 | µA/V | ||||
Linear Input Range | (3) | ±125 | mV | |||
Transconductance Bandwidth | -6dB Unloaded Response(3), MIN: TJ = 25°C | 0.5 | 1 | MHz | ||
OFF TIMER (RCT) | ||||||
tOFF-MIN | Minimum Off-time | RCT = 1V through 1 kΩ | 35 | 75 | ns | |
RRCT | RCT Reset Pulldown Resistance | 36 | 120 | Ω | ||
VRCT | VIN/25 Reference Voltage | VIN = 14V | 540 | 565 | 585 | mV |
PWM COMPARATOR | ||||||
COMP to PWM Offset | 700 | 800 | 900 | mV | ||
CURRENT LIMIT (IS) | ||||||
VLIM | Current Limit Threshold | 215 | 245 | 275 | mV | |
VLIM Delay to Output | 35 | 75 | ns | |||
tON-MIN | Leading Edge Blanking Time | 75 | 250 | 450 | ||
HIGH SIDE TRANSCONDUCTANCE AMPLIFIER | ||||||
Input Bias Current | 10 | µA | ||||
Transconductance | 20 | 119 | mA/V | |||
Input Offset Current | –1.5 | 0 | 1.5 | µA | ||
Input Offset Voltage | –7 | 0 | 7 | mV | ||
Transconductance Bandwidth | ICSH = 100 µA(3), MIN: TJ = 25°C | 250 | 500 | kHz | ||
GATE DRIVER (GATE) | ||||||
RSRC(GATE) | GATE Sourcing Resistance | GATE = High | 2 | 6 | Ω | |
RSNK(GATE) | GATE Sinking Resistance | GATE = Low | 1.3 | 4.5 | ||
UNDERVOLTAGE LOCKOUT and DIM INPUT (nDIM) | ||||||
VTH-nDIM | nDIM / UVLO Threshold | 1.18 | 1.24 | 1.28 | V | |
IHYS-nDIM | nDIM Hysteresis Current | 10 | 20 | 30 | µA | |
THERMAL SHUTDOWN | ||||||
TSD | Thermal Shutdown Threshold | (3) | 165 | °C | ||
THYS | Thermal Shutdown Hysteresis | (3) | 25 |