The ramp signal used for the pulse width modulator in current mode control is typically derived directly from the buck switch current. This signal corresponds to the positive slope portion of the buck inductor current. Using this signal for the PWM ramp simplifies the control loop transfer function to a single pole response and provides inherent input voltage feedforward compensation. The disadvantage of using the buck switch current signal for PWM control is the large leading edge spike due to circuit parasitics which must be filtered or blanked. Also, the current measurement can introduce significant propagation delays. The filtering time, blanking time, and propagation delay limit the minimum achievable pulse width. In applications where the input voltage can be relatively large in comparison to the output voltage, controlling small pulse widths and duty cycles are necessary for regulation. The LM5088 utilizes a unique ramp generator, which does not actually measure the buck switch current but rather reconstructs or emulates the signal. Emulating the inductor current provides a ramp signal that is free of leading edge spikes and measurement or filtering delays. The current reconstruction is comprised of two elements: a sample and hold DC level and an emulated current ramp.

Figure 7-3 Composition of Current Sense Signal

The sample and hold DC level illustrated in Figure 7-3 is derived from a measurement of the re-circulating (or free-wheeling) diode current. The diode current flows through the current sense resistor connected between the CS and CSG pins. The voltage across the sense resistor is sampled and held just prior to the onset of the next conduction interval of the buck switch. The diode current sensing and sample and hold provide the DC level for the reconstructed current signal. The positive slope inductor current ramp is emulated by an external capacitor connected from the RAMP pin to GND and an internal voltage controlled current source. The ramp current source that emulates the inductor current is a function of the V_IN and V_OUT voltages per the following equation:

Proper selection of the RAMP capacitor depends upon the selected value of the output inductor and the current sense resistor (R_S). For proper current emulation, the DC sample and hold value and the ramp amplitude must have the same dependence on the load current. That is:

Equation 3.

where

• g_m is the ramp current generator transconductance (5 µA/V).
• A is the gain of the current sense amplifier (10 V/V).

The RAMP capacitor must connected directly to the RAMP and GND pins of the IC.

For duty cycles greater than 50%, peak current mode control circuits are subject to subharmonic oscillation. Subharmonic oscillation is normally characterized by alternating wide and narrow pulses at the SW pin. Adding a fixed slope voltage ramp (slope compensation) to the current sense signal prevents this oscillation. The 25-µA offset current supplied by the emulated current source provides a fixed slope to the ramp signal. In some high output voltage, high duty cycles applications, additional slope compensation can be required. In these applications, a pullup resistor can be added between the RAMP and VCC pins to increase the ramp slope compensation. A formula to configure pullup resistor is shown in Section 8.