JAJSI34H February   2019  – June 2024 LM63615-Q1 , LM63625-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1.     Absolute Maximum Ratings
    2. 6.1 ESD Ratings
    3. 6.2 Recommended Operating Conditions
    4. 6.3 Thermal Information
    5. 6.4 Electrical Characteristics
    6. 6.5 Timing Characteristics
    7. 6.6 Switching Characteristics
    8. 6.7 System Characteristics
    9. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Sync/Mode Selection
      2. 7.3.2 Output Voltage Selection
      3. 7.3.3 Switching Frequency Selection
        1. 7.3.3.1 Spread Spectrum Option
      4. 7.3.4 Enable and Start-Up
      5. 7.3.5 RESET Flag Output
      6. 7.3.6 Undervoltage Lockout and Thermal Shutdown and Output Discharge
    4. 7.4 Device Functional Modes
      1. 7.4.1 Overview
      2. 7.4.2 Light Load Operation
        1. 7.4.2.1 Sync/FPWM Operation
      3. 7.4.3 Dropout Operation
      4. 7.4.4 Minimum On-time Operation
      5. 7.4.5 Current Limit and Short-Circuit Operation
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Choosing the Switching Frequency
        2. 8.2.2.2 Setting the Output Voltage
          1. 8.2.2.2.1 CFF Selection
        3. 8.2.2.3 Inductor Selection
        4. 8.2.2.4 Output Capacitor Selection
        5. 8.2.2.5 Input Capacitor Selection
        6. 8.2.2.6 CBOOT
        7. 8.2.2.7 VCC
        8. 8.2.2.8 External UVLO
        9. 8.2.2.9 Maximum Ambient Temperature
      3. 8.2.3 Full Feature Design Example
      4. 8.2.4 Application Curves
      5. 8.2.5 EMI Performance Curves
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Ground and Thermal Considerations
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Device Nomenclature
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.4 Electrical Characteristics

Limits apply over the junction temperature (TJ) range of –40°C to +150°C, unless otherwise stated. Minimum and maximum limits are specified through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated, the following conditions apply: VIN = 13.5 V. (1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE (VIN PIN)
VIN Minimum operating input voltage 3.5 V
IQ Non-switching input current; measured at the VIN pin (2) VEN = 3.3 V, VFB = 1.2× regulation point 23 40 µA
ISD Shutdown quiescent current; measured at the VIN pin VEN = 0 5.3 10 µA
VUVLO_R Minimum operating voltage threshold Rising VIN, IVCC = 0 3.5 V
VUVLO_F Minimum operating voltage threshold Falling VIN, IVCC = 0 2.6 3 V
IPOR Pull down current on SW when OVP is triggered VEN = 0 V, VSW = 5 V 0.5 1.5 2.5 mA
ENABLE (EN PIN)
VEN-VCC VCC enable voltage VEN rising 0.85 V
VEN-H Precision enable high level for VOUT VEN rising 1.425 1.5 1.575 V
VEN-L Precision enable low level for VOUT VEN falling 0.9 0.94 V
ILKG-EN Enable input leakage current VEN = 13.5 V, WSON package –100 0.2 300 nA
ILKG-EN Enable input leakage current VEN = 13.5 V, HTSSOP package –100 0.2 150 nA
OUTPUT VOLTAGE SELECTION (VSEL PIN)
RSEL-ADJ Resistor range for valid adjustable output voltage selection at start-up 8 50 kΩ
INTERNAL LDO
VCC Internal VCC voltage 6 V ≤ VIN ≤ maximum operating VIN 4.75 5 5.25 V
VCCM VCC clamp voltage 1 mA sourced into VCC 5.25 5.55 5.8 V
VOLTAGE REFERENCE (FB PIN)
VFB_ADJ Feedback voltage VIN = 3.5 V – maximum operating VIN 0.985 1 1.015 V
VFB_5V Feedback voltage VIN = 5.5 V – maximum operating VIN 4.925 5 5.075 V
VFB_3p3V Feedback voltage VIN = 3.8 V – maximum operating VIN 3.25 3.3 3.35 V
IFB_ADJ Input leakage current at the FB pin FB = 1.0 V 0.2 100 nA
IFB_5V Input leakage current at the FB pin FB = 5.0 V 2.89 3.4 µA
IFB_3p3V Input leakage current at the FB pin FB = 3.3 V 1.67 2 µA
CURRENT LIMITS
ISC Short circuit high-side current limit 2.5-A version 3.18 3.75 4.41 A
ILS-LIMIT Low-side current limit 2.55 3 3.53 A
IPEAK-MIN Minimum peak inductor current 0.373 0.65 1.0 A
IL-NEG Negative current limit –2.35 –1.8 –1.25 A
ISC Short circuit high-side current limit 1.5-A version 1.9 2.25 2.7 A
ILS-LIMIT Low-side current limit 1.5 1.8 2.12 A
IPEAK-MIN Minimum peak inductor current 0.122 0.375 0.7 A
IL-NEG Negative current limit –1.49 –1.2 –0.75 A
VHICCUP Hiccup threshold on the FB pin 37% 42% 47%
POWER GOOD (RESET PIN)
VRESET-HIGH RESET upper threshold — rising % of FB voltage 110% 112% 115%
VRESET-LOW RESET lower threshold — falling % of FB voltage 91% 93% 95%
VRESET-HYS RESET hysteresis % of FB voltage 1.1% 1.8% 2.5%
VRESET_VALID Minimum input voltage for proper PG function Measured when VRESET < 0.4 V with 10-kΩ pullup to external 5 V 0.7 1.04 1.25 V
RRESET RESET ON resistance VEN = 5.0 V, 1-mA pullup current 60 150 Ω
RRESET RESET ON resistance VEN = 0 V, 1-mA pullup current 40 125 Ω
OSCILLATOR (SYNC/MODE PIN)
VSYNC-HIGH Sync input and mode high level threshold 1.5 1.8 V
VSYNC-HYS Sync input hysteresis 0.355 V
VSYNC-LOW Sync input and mode low level threshold 0.8 1.15 V
RSYNC Pulldown on MODE pin 100 kΩ
MOSFETS
RDS-ON-HS High-side MOSFET on-resistance Load = 1 A 93 mΩ
RDS-ON-LS Low-side MOSFET on-resistance Load = 1 A 61 mΩ
VCBOOT-UVLO CBOOT – SW UVLO threshold (3) 2.13 V
(1) MIN and MAX limits are 100% production tested at 25ºC. Limits over the operating temperature range verified through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate Average Outgoing Quality Level (AOQL).
(2) This is the current used by the device open loop. It does not represent the total input current of the system when in regulation.
(3) When the voltage across the CBOOT capacitor falls below this voltage, the low-side MOSFET is turn to recharge the boot capacitor.