JAJSI34H February   2019  – June 2024 LM63615-Q1 , LM63625-Q1

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1.     Absolute Maximum Ratings
    2. 6.1 ESD Ratings
    3. 6.2 Recommended Operating Conditions
    4. 6.3 Thermal Information
    5. 6.4 Electrical Characteristics
    6. 6.5 Timing Characteristics
    7. 6.6 Switching Characteristics
    8. 6.7 System Characteristics
    9. 6.8 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Sync/Mode Selection
      2. 7.3.2 Output Voltage Selection
      3. 7.3.3 Switching Frequency Selection
        1. 7.3.3.1 Spread Spectrum Option
      4. 7.3.4 Enable and Start-Up
      5. 7.3.5 RESET Flag Output
      6. 7.3.6 Undervoltage Lockout and Thermal Shutdown and Output Discharge
    4. 7.4 Device Functional Modes
      1. 7.4.1 Overview
      2. 7.4.2 Light Load Operation
        1. 7.4.2.1 Sync/FPWM Operation
      3. 7.4.3 Dropout Operation
      4. 7.4.4 Minimum On-time Operation
      5. 7.4.5 Current Limit and Short-Circuit Operation
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Choosing the Switching Frequency
        2. 8.2.2.2 Setting the Output Voltage
          1. 8.2.2.2.1 CFF Selection
        3. 8.2.2.3 Inductor Selection
        4. 8.2.2.4 Output Capacitor Selection
        5. 8.2.2.5 Input Capacitor Selection
        6. 8.2.2.6 CBOOT
        7. 8.2.2.7 VCC
        8. 8.2.2.8 External UVLO
        9. 8.2.2.9 Maximum Ambient Temperature
      3. 8.2.3 Full Feature Design Example
      4. 8.2.4 Application Curves
      5. 8.2.5 EMI Performance Curves
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Ground and Thermal Considerations
      2. 8.5.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Device Nomenclature
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

System Characteristics

The following specifications apply only to the typical applications circuit with nominal component values. Specifications in the typical (TYP) column apply to TJ = 25°C only. Specifications in the minimum (MIN) and maximum (MAX) columns apply to the case of typical components over the temperature range of TJ = –40°C to 150°C. These specifications are not ensured by production testing.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE (VIN PIN)
ISUPPLY Input supply current when in regulation VIN = 12 V, VOUT = 3.3 V, IOUT = 0 A, RFBT = 1 MΩ 23 µA
VDROP Dropout voltage; (VIN – VOUT) VOUT = 5 V, IOUT = 1 A, fSW = 1850 kHz 0.95 V
VDROP Dropout voltage; (VIN – VOUT) VOUT = 5 V, IOUT = 1 A, VOUT – 1% of regulation, fSW = 140 kHz 150 mV
DMAX Maximum switch duty cycle (2) VIN = VOUT = 12 V, IOUT = 1 A 98% %
VOLTAGE REFERENCE (FB PIN)
VOUT (1) VOUT = 5 V VIN = 7 V to 30 V, IOUT = 1 A to full load, CCM –1.5% 1.5%
VOUT = 5 V VIN = 7 V to 30 V,  IOUT = 0 A to full load, auto mode –1.5% 2.5%
VOUT (1) VOUT = 3.3 V VIN = 3.8 V to 30 V, IOUT = 1 A to full load, CCM –1.5% 1.5%
VOUT = 3.3 V VIN = 3.8 V to 30 V, IOUT = 0 A to full load, auto mode –1.5% 2.5%
tSYNC-L Delay from sync clock staying low to PFM entry 100 ns
tSYNC-H Delay from sync clock staying high to default frequency 100 ns
THERMAL SHUTDOWN
TSD Thermal shutdown temperature Shutdown temperature 155 163 175 °C
TSDR Thermal shutdown temperature Recovery temperature 150 °C
Deviation is with respect to VIN = 13.5 V, IOUT = 1 A.
In dropout, the switching frequency drops to increase the effective duty cycle. The lowest frequency is clamped at approximately: fMIN = 1 / (tON-MAX + tOFF-MIN). DMAX = tON-MAX / (tON-MAX + tOFF-MIN).