JAJSRX4 May   2024 LMG2650

ADVANCE INFORMATION  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
  7. Parameter Measurement Information
    1. 6.1 GaN Power FET Switching Parameters
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  GaN Power FET Switching Capability
      2. 7.3.2  Turn-On Slew-Rate Control
      3. 7.3.3  Current-Sense Emulation
      4. 7.3.4  Bootstrap Diode Function
      5. 7.3.5  Input Control Pins (EN, INL, INH, GDH)
      6. 7.3.6  INL - INH Interlock
      7. 7.3.7  AUX Supply Pin
        1. 7.3.7.1 AUX Power-On Reset
        2. 7.3.7.2 AUX Under-Voltage Lockout (UVLO)
      8. 7.3.8  BST Supply Pin
        1. 7.3.8.1 BST Power-On Reset
        2. 7.3.8.2 BST Under-Voltage Lockout (UVLO)
      9. 7.3.9  Overcurrent Protection
      10. 7.3.10 Overtemperature Protection
      11. 7.3.11 Fault Reporting
    4. 7.4 Device Functional Modes
  9. Device and Documentation Support
    1. 8.1 ドキュメントの更新通知を受け取る方法
    2. 8.2 サポート・リソース
    3. 8.3 Trademarks
    4. 8.4 静電気放電に関する注意事項
    5. 8.5 用語集
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
  • RFB|19
サーマルパッド・メカニカル・データ
発注情報

Overtemperature Protection

The LMG2650 implements separate overtemperature protection for both the low-side and high-side device circuits. The low-side overtemperature protection blocks the INL pin from turning on the low-side GaN power FET and blocks the INH pin from turning on the high-side GaN power FET if the low-side temperature is above the overtemperature protection temperature. The high-side overtemperature protection blocks the GDH pin from turning on the high-side GaN power FET if the high-side temperature is above the overtemperature protection temperature. Figure 7-3 shows the overtemperature blocking operation. The overtemperature protection hysteresis avoids erratic thermal cycling.

The low-side overtemperature protection is enabled when the AUX voltage is above the AUX Power-On Reset voltage. The low AUX Power-On Reset voltage helps the overtemperature protection remain operational when the AUX rail droops during a power converter cool-down phase. The high-side overtemperature protection is enabled when the BST-to-SW voltage is above the BST Power-On Reset voltage.

A low-side overtemperature fault is reported on the FLT pin when the low-side overtemperature protection is asserted. This is the only fault event reported on the FLT pin.