SLVS582K
April 2006 – December 2024
LP2950
,
LP2951
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics (Both Legacy and New Chip)
5.6
Timing Requirements (New Chip only)
5.7
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagrams
6.3
Feature Description
6.3.1
Output Enable
6.3.2
Dropout Voltage
6.3.3
Current Limit
6.3.4
Undervoltage Lockout (UVLO)
6.3.5
Thermal Shutdown
6.4
Device Functional Modes
6.4.1
Shutdown Mode
7
Application and Implementation
7.1
Application Information
7.1.1
Reverse Current
7.1.2
Input and Output Capacitor Requirements
7.1.3
Estimating Junction Temperature
7.1.4
Power Dissipation (PD)
7.2
Typical Application
7.2.1
Design Requirements
7.2.1.1
Recommended Capacitor Types
7.2.1.1.1
Recommended Capacitors for the Legacy Chip
7.2.1.1.1.1
ESR Range (Legacy Chip)
7.2.1.1.2
Recommended Capacitors for the New Chip
7.2.2
Detailed Design Procedure
7.2.2.1
Feedback Resistor Selection
7.2.2.2
Feedforward Capacitor
7.2.3
Application Curve
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Device Support
8.1.1
Development Support
8.2
Receiving Notification of Documentation Updates
8.3
Device Nomenclature
8.4
Documentation Support
8.4.1
Related Documentation
8.5
Support Resources
8.6
Trademarks
8.7
Electrostatic Discharge Caution
8.8
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
D|8
MSOI002K
DRG|8
MPDS151B
サーマルパッド・メカニカル・データ
DRG|8
QFND084H
発注情報
slvs582k_oa
slvs582k_pm
1
Features
Wide input voltage range
V
IN
range : 2V to 30V
Wide output voltage range V
OUT
Fixed option: 3V (legacy Chip), 3.3V, 5.0V
Adjustable option: 1.2V to 29V
Output current: 100mA
V
OUT
accuracy:
±2% over line, load, and temperature (legacy chip)
±1% over line, load, and temperature (new chip)
Quiescent current I
Q
(new chip): 50μA (typical)
Low dropout (new chip):: 340mV (typical)
Output current limiting and thermal shutdown
Stable over a wide range of ceramic output capacitor values
C
OUT
range: 1μF to 100μF (new chip)
ESR range: 0 to 2Ω (new chip)
Operating junction temperature: –40°C to 125°C
Package option:
LP (3-pin TO-92)
D (8-pin SOIC)
DRG (8-pin WSON)