JAJSPZ6 データシート

JAJSPZ6F May 2002 – March 2023 SN65HVD05 , SN65HVD06 , SN65HVD07 , SN75HVD05 , SN75HVD06 , SN75HVD07

PRODUCTION DATA

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

D|8
- MSOI002K
P|8
- MPDI001B

サーマルパッド・メカニカル・データ

発注情報

5.8 Receiver Switching Characteristics

over operating free-air temperature range unless otherwise noted

PARAMETER			TEST CONDITIONS	TYP⁽¹⁾	MAX	UNIT
t_PLH	Propagation delay time, low-to-high-level output 1/2 UL	HVD05	V_ID = –1.5 V to 1.5 V, C_L = 15 pF, See Figure 6-8	14.6	25	ns
t_PHL	Propagation delay time, high-to-low-level output 1/2 UL	HVD05		14.6	25	ns
t_PLH	Propagation delay time, low-to-high-level output 1/8 UL	HVD06		55	70	ns
t_PLH	Propagation delay time, low-to-high-level output 1/8 UL	HVD07		55	70	ns
t_PHL	Propagation delay time, high-to-low-level output 1/8 UL	HVD06		55	70	ns
t_PHL	Propagation delay time, high-to-low-level output 1/8 UL	HVD07		55	70	ns
t_sk(p)	Pulse skew (\|t_PHL – t_PLH\|)	HVD05			2	ns
		HVD06			4.5
		HVD07			4.5
t_sk(pp)⁽²⁾	Part-to-part skew	HVD05			6.5	ns
		HVD06			14
		HVD07			14
t_r	Output signal rise time		C_L = 15 pF, See Figure 6-8	2	3	ns
t_f	Output signal fall time		C_L = 15 pF, See Figure 6-8	2	3	ns
t_PZH1	Output enable time to high level		C_L = 15 pF, DE at 3 V, See Figure 6-9		10	ns
t_PZL1	Output enable time to low level				10
t_PHZ	Output disable time from high level				15
t_PLZ	Output disable time from low level				15
t_PZH2	Propagation delay time, standby-to-high-level output		C_L = 15 pF, DE at 0, See Figure 6-10		6	μs
t_PZL2	Propagation delay time, standby-to-low-level output		C_L = 15 pF, DE at 0, See Figure 6-10		6	μs

(1) All typical values are at 25°C and with a 5-V supply.

(2) t_sk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits.