JAJSFG7L June   1999  – July 2024 THS4031 , THS4032

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information - THS4031
    5. 5.5 Thermal Information - THS4032
    6. 5.6 Electrical Characteristics - RL = 150Ω
    7. 5.7 Electrical Characteristics - RL = 1kΩ
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Offset Nulling
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Driving a Capacitive Load
      2. 7.1.2 Low-Pass Filter Configurations
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Multiplexer Selection
        2. 7.2.2.2 Signal Source
        3. 7.2.2.3 Driving Amplifier
          1. 7.2.2.3.1 Driving Amplifier Bandwidth Restriction
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 General PowerPAD™ Integrated Circuit Package Design Considerations
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 商標
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • D|8
  • DGN|8
サーマルパッド・メカニカル・データ
発注情報

9 Revision History

Changes from Revision K (May 2024) to Revision L (July 2024)

  • Added thermal pad information in Tables 4-1 and 4-2Go
  • Updated Thermal Information: THS4032 for the D and DGN packagesGo
  • Changed title of Electrical Characteristics - THS4031, RL = 150Ω to Electrical Characteristics - RL = 150Ω Go
  • Moved Total harmonic distortion for THS4032 from Electrical Characteristics - THS4032, RL = 150Ω to Electrical Characteristics - RL = 150Ω Go
  • Moved Channel-to-channel crosstalk from Electrical Characteristics - THS4032, RL = 150Ω to Electrical Characteristics - RL = 150Ω Go
  • Deleted Supply voltage from Electrical Characteristics Go
  • Changed title of Electrical Characteristics - THS4031, RL = 1kΩ to Electrical Characteristics - RL = 1kΩ Go
  • Changed Total harmonic distortion for THS4032 from -96 dBc to -90 dBc and moved from Electrical Characteristics - THS4032, RL = 1kΩ to Electrical Characteristics - RL = 1kΩ Go
  • Changed unit from µA to nA for Input offset current in Electrical Characteristics - RL = 1kΩ Go
  • Changed title of Typical Characteristics - THS4031 section to Typical Characteristics Go
  • Deleted Typical Characteristics - THS4032 sectionGo
  • Changed title of Figure 5-15, Figure 5-16, Figure 5-17, and Figure 5-18 from Harmonic Distortion vs Frequency to THS4031 Harmonic Distortion vs Frequency in Typical Characteristics Go
  • Changed max voltage from 33V (±16.5V) to 32V (±16V) in Device Functional Modes Go

Changes from Revision J (February 2024) to Revision K (May 2024)

  • Deleted Total harmonic distortion + noise and Intermodulation distortion specifications from Electrical Characteristics - THS4031, RL = 150 Ω Go
  • Deleted Total harmonic distortion + noise and Intermodulation distortion specifications from Electrical Characteristics - THS4031, RL = 1 kΩ Go
  • Changed gain from +2 V/V to +1 V/V in Typical Characteristics - THS4031 Go
  • Changed abscissa axis label from 10ns/div to 100ns/div in Figure 5-23, 20V Step Response Go