JAJSO83B May   2024  – October 2024 THVD2410V-EP , THVD2450V-EP , THVD2452V-EP

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  ESD Ratings [IEC]
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Thermal Information
    6. 5.6  Power Dissipation
    7. 5.7  Electrical Characteristics
    8. 5.8  Switching Characteristics - 250 kbps
    9. 5.9  Switching Characteristics - 1 Mbps
    10. 5.10 Switching Characteristics - 20 Mbps
    11. 5.11 Switching Characteristics - 50 Mbps
    12. 5.12 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 ±70-V Fault Protection
      2. 7.3.2 Integrated IEC ESD and EFT Protection
      3. 7.3.3 Driver Overvoltage and Overcurrent Protection
      4. 7.3.4 Enhanced Receiver Noise Immunity
      5. 7.3.5 Receiver Fail-Safe Operation
      6. 7.3.6 Low-Power Shutdown Mode
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Data Rate and Bus Length
        2. 8.2.1.2 Stub Length
        3. 8.2.1.3 Bus Loading
        4. 8.2.1.4 Transient Protection
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 サード・パーティ製品に関する免責事項
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

4 Pin Configuration and Functions

Figure 4-1 THVD2410V-EP, THVD2450V-EP
10-Pin DRC Package (VSON)
(Top View)
Figure 4-2 THVD2452V-EP
14-Pin D Package (SOIC)
(Top View)
Table 4-1 Pin Functions
NAMEPIN NO.TYPEDESCRIPTION
DRCD
VIO11Logic Supply1.65V to 5.5V supply for logic I/O signals R, RE, D, DE, and SLR)
R22Digital OutputReceive data output
DE34Digital InputDriver enable input; integrated pull-down
RE43Digital InputReceiver enable input;

integrated pull-up

D55Digital InputTransmission data input;

integrated pull-up

GND66Reference PotentialLocal device ground
SLR78Digital InputSlew rate select ; integrated pull-down. For THVD2410V-EP: Low = 1Mbps, High = 250kbps. Defaults to 1Mbps if SLR is left floating. For THVD2450V-EP and THVD2452V-EP: Low = 50Mbps, High = 20Mbps. Defaults to 50Mbps if left floating.
A812Bus InputBus I/O (half-duplex), bus input (full-duplex)
B911Bus InputBus I/O (half-duplex), bus input (full-duplex)
VCC1014Bus Supply3V to 5.5V supply for the transceiver
Y-9Bus OutputBus output, Y
Z-10Bus OutputBus output, Z
NC-7, 13No connect pin. Internally not connected