JAJSDS2A September   2017  – February 2022 TIC10024-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  VS Pin
      2. 8.3.2  VDD Pin
      3. 8.3.3  Device Initialization
      4. 8.3.4  Device Trigger
      5. 8.3.5  Device Reset
        1. 8.3.5.1 VS Supply POR
        2. 8.3.5.2 Hardware Reset
        3. 8.3.5.3 Software Reset
      6. 8.3.6  VS Under-Voltage (UV) Condition
      7. 8.3.7  VS Over-Voltage (OV) Condition
      8. 8.3.8  Switch Inputs Settings
        1. 8.3.8.1 Input Current Source and Sink Selection
        2. 8.3.8.2 Input Enable Selection
        3. 8.3.8.3 Thresholds Adjustment
        4. 8.3.8.4 Wetting Current Configuration
      9. 8.3.9  Interrupt Generation and INT Assertion
        1. 8.3.9.1 INT Pin Assertion Scheme
        2. 8.3.9.2 Interrupt Idle Time (tINT_IDLE) Time
        3. 8.3.9.3 Microcontroller Wake-Up
        4. 8.3.9.4 Interrupt Enable / Disable And Interrupt Generation Conditions
        5. 8.3.9.5 Detection Filter
      10. 8.3.10 Temperature Monitor
        1. 8.3.10.1 Temperature Warning (TW)
        2. 8.3.10.2 Temperature Shutdown (TSD)
      11. 8.3.11 Parity Check And Parity Generation
      12. 8.3.12 Cyclic Redundancy Check (CRC)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Continuous Mode
      2. 8.4.2 Polling Mode
      3. 8.4.3 Additional Features
        1. 8.4.3.1 Clean Current Polling (CCP)
        2. 8.4.3.2 Wetting Current Auto-Scaling
  9. 9 Programming
    1. 9.1 SPI Communication Interface Buses
      1. 9.1.1 Chip Select ( CS)
      2. 9.1.2 System Clock (SCLK)
      3. 9.1.3 Slave In (SI)
      4. 9.1.4 Slave Out (SO)
    2. 9.2 SPI Sequence
      1. 9.2.1 Read Operation
      2. 9.2.2 Write Operation
      3. 9.2.3 Status Flag
    3. 9.3 Programming Guidelines
    4. 9.4 Register Maps
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Digital Switch Detection in Automotive Body Control Module
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
    3. 10.3 Systems Examples
      1. 10.3.1 Using TIC10024-Q1 in a 12 V Automotive System
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Receiving Notification of Documentation Updates
    2. 13.2 Community Resources
    3. 13.3 Trademarks
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.3 Recommended Operating Conditions

over operating free-air temperature range and VS = 12 V (unless otherwise noted)
MINNOMMAXUNIT
VSPower supply voltage4.535 (2)V
VDDLogic supply voltage3.05.5V
V/INTINT pin voltage035(2)V
VINXIN0 to IN23 input voltage035(2)V
VRESETRESET pin voltage05.5V
VSPI_IOSPI input/output logic level0VDDV
fSPISPI communication frequency20(1)4MHz
TAOperating free-air temperature-40125°C
(1) Lowest frequency characterized.
(2) Tested for load dump and jump start conditions with nominal operating voltage no greater than 16 V for the life of a 12-V automotive system. Refer to Using TIC10024-Q1 in a 12 V Automotive System for more details.