JAJSDM5E September 2017 – November 2019 TLV7011 , TLV7012 , TLV7021 , TLV7022
PRODUCTION DATA.
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
VIO | Input Offset Voltage | VS = 1.8 V and 5 V, VCM = VS / 2 | ±0.1 | ±8 | mV | ||
VHYS | Hysteresis | VS = 1.8 V and 5 V, VCM = VS / 2 | 2 | 9 | 15 | mV | |
VCM | Common-mode voltage range | VEE | VCC + 0.1 | V | |||
IB | Input bias current | 2 | pA | ||||
IOS | Input offset current | 1 | pA | ||||
VOH | Output voltage high (for TLV7012 only) | VS = 5 V, VEE = 0 V, IO = 3 mA | 4.65 | 4.8 | V | ||
VOL | Output voltage low | VS = 5 V, VEE = 0 V, IO = 3 mA | 250 | 350 | mV | ||
ILKG | Open-drain output leakage
current (TLV7022 only) |
VS = 5 V, VID = +0.1 V (output high),
VPULLUP = VCC |
100 | pA | |||
CMRR | Common-mode rejection ratio | VEE < VCM < VCC, VS = 5 V | 73 | dB | |||
PSRR | Power supply rejection ratio | VS = 1.8 V to 5 V, VCM = VS / 2 | 77 | dB | |||
ISC | Short-circuit current | VS = 5 V, sourcing (for TLV7012 only) | 29 | mA | |||
VS = 5 V, sinking | 33 | ||||||
ICC | Supply current / Channel | VS = 1.8 V, no load, VID = –0.1 V (Output Low) | 4.7 | 9 | µA |