JAJSDY2J September   2017  – November 2024 TLV7031 , TLV7032 , TLV7034 , TLV7041 , TLV7042 , TLV7044

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
    1. 4.1 Pin Functions: TLV7031/41 Singles including "S" and "L" options
    2. 4.2 Pin Functions: TLV7032/42 Dual
    3. 4.3 Pin Functions: TLV7034/44 Quad
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information (Single)
    5. 5.5  Thermal Information (Dual)
    6. 5.6  Thermal Information (Quad)
    7. 5.7  Electrical Characteristics (Single)
    8. 5.8  Switching Characteristics (Single)
    9. 5.9  Electrical Characteristics (Dual)
    10. 5.10 Switching Characteristics (Dual)
    11. 5.11 Electrical Characteristics (Quad)
    12. 5.12 Switching Characteristics (Quad)
    13. 5.13 Timing Diagrams
    14. 5.14 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
      1. 6.4.1 Inputs
      2. 6.4.2 Internal Hysteresis
      3. 6.4.3 Output
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Inverting Comparator With Hysteresis for TLV703x
      2. 7.1.2 Non-Inverting Comparator With Hysteresis for TLV703x
    2. 7.2 Typical Applications
      1. 7.2.1 Window Comparator
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
      2. 7.2.2 IR Receiver Analog Front End
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Curve
      3. 7.2.3 Square-Wave Oscillator
        1. 7.2.3.1 Design Requirements
        2. 7.2.3.2 Detailed Design Procedure
        3. 7.2.3.3 Application Curve
      4. 7.2.4 Quadrature Rotary Encoder
        1. 7.2.4.1 Design Requirements
        2. 7.2.4.2 Detailed Design Procedure
        3. 7.2.4.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Evaluation Module
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.2.2.2 Detailed Design Procedure

The IR receiver AFE design is highly streamlined and optimized. R1 converts the IR light energy induced current into voltage and applies to the inverting input of the comparator. The RC network of R2 and C1 establishes a reference voltage Vref, which tracks the mean amplitude of the IR signal. The noninverting input is directly connected to Vref through R3. R3 and R4 are used to produce a hysteresis to keep transitions free of spurious toggles. To reduce the current drain from the coin cell battery, data transmission must be short and infrequent.

More technical details are provided in the TI TechNote Low Power Comparator for Signal Processing and Wake-Up Circuit in Smart Meters (SNVA808).