JAJSD84M March   2017  – December 2024 TLV9061 , TLV9062 , TLV9064

PRODMIX  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5.   Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information: TLV9061
    5. 5.5  Thermal Information: TLV9061S
    6. 5.6  Thermal Information: TLV9062
    7. 5.7  Thermal Information: TLV9062S
    8. 5.8  Thermal Information: TLV9064
    9. 5.9  Thermal Information: TLV9064S
    10. 5.10 Electrical Characteristics
    11. 5.11 Typical Characteristics
  8. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Rail-to-Rail Input
      2. 6.3.2 Rail-to-Rail Output
      3. 6.3.3 EMI Rejection
      4. 6.3.4 Overload Recovery
      5. 6.3.5 Shutdown Function
    4. 6.4 Device Functional Modes
  9. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Typical Low-Side Current Sense Application
      2. 7.2.2 Design Requirements
      3. 7.2.3 Detailed Design Procedure
      4. 7.2.4 Application Curve
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 Input and ESD Protection
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  10. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  11. Revision History
  12. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Abstract

DEVICE NO. OF
CHANNELS
PACKAGE LEADS
SOIC
D
USON
DRY
SOT-23
DBV
SC-70
DCK
VSSOP
DGK
VSSOP
DGS
DSBGA
YCK
X2SON
DPW
SOT-553
DRL
WSON
DSG
TSSOP
PW
SOT-23
DDF
WQFN
RTE
X2QFN
RUC
X2QFN
RUG
TLV9061 1 8 5 5 5 5
TLV9061S 6 6
TLV9062 2 8 8 10 8 8 8
TLV9062S 10 9 10
TLV9064 4 14 14 16 14
TLV9064S 16